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This paper presents a link adaptive processor to perform low-complexity channel estimation and QR decomposition (QRD) in Long Term Evolution-Advanced (LTE-A) receivers. The processor utilizes frequency domain correlation of the propagation channel to adaptively avoid unnecessary computations in the received signal processing, achieving significant complexity reduction with negligible performance loss...
This paper presents a high-speed QR decomposition (QRD) processor targeting the carrier-aggregated 4×4 Long Term Evolution-Advanced (LTE-A) receiver. The processor provides robustness in spatially correlated channels with reduced complexity by using modifications to the Householder transform, such as decomposing-target redefinition and matrix real-valued decomposition. In terms of hardware design,...
This paper presents an area/energy efficient soft-output MIMO detector that supports the detection of spatial-multiplexing (SM), spatial-diversity (SD), and space-division-multiple-access (SDMA) signals. The developed near-optimal detection algorithms for these three modes share most of the mathematical operations to enable extensive hardware reuse. A unified VLSI architecture is accordingly designed...
This paper presents a cost-efficient soft-output signal detector design solution targeting on the spatial-multiplexing MIMO system. The detector achieves low hardware cost and near-optimal detection performance based on the modification to the fixed-complexity sphere decoder (FSD) using several implementation-oriented algorithm-level improvements, which are early-pruning with polygon-shaped constraint,...
Computing Euclidean Distances is a very important operation in digital communication, especially in the case of trellis coded modulation, where it is used numerously. This paper shows that a substantial reduction in complexity can be achieved in hardware processing elements for computing Euclidean Distances. A reduction in complexity down to 39% is shown compared to traditional designs. The paper...
This paper shows a novel methodology to reduce the power consumption and complexity in unrolled CORDIC architectures. It is a methodology based on removing adder and subtractor stages starting from the first stage. The stages are replaced with a number of MUXes. Three to four stages can be removed with substantial reduction in complexity and power consumption. The methodology is applicable on CORDICs...
This paper describes a novel approach to a Matched Pursuit LTE Channel Estimator. It is shown that the total complexity of the estimator can be reduced by, perhaps counter-intuitively, increasing the resolution of the estimator, since for certain choices of resolution a number of multiplication factors will be zero. An architecture is presented that implements the novel algorithm. By increasing the...
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