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In this study, the quality of grain boundaries was evaluated by measuring their strength. In order to evaluate the strength of grain boundaries quantitatively, a micro-tensile test method that can measure the strength of a grain boundary has been developed. A focused ion beam was used for making a fine columnar sample which consisted of two grains in series. The sample was jointed to a small both...
The degradation process of the crystallographic quality of copper thin films, which are used for interconnections and micro bumps for 3D integration, during electromigration and stress-induced migration tests is dominated by the diffusion along grain boundaries and the diffusion constant of copper varies drastically depending on the crystallinity of the films. The degradation process was visualized...
Since the residual stress in a silicon chip mounted in 3D modules causes the degradation of both electrical and mechanical reliability, the dominant factors of the residual stress was investigated by using a finite element method and experiments applying 2-μm long piezoresistance strain gauges. The residual stress and local deformation of the chip were found to vary drastically depending on the mechanical...
A new nondestructive evaluation method for detecting delamination between a chip and metallic bumps in area-arrayed flip chip structures has been developed by measuring the local surface deformation of a chip, which is caused by the mismatch in mechanical properties between the metallic bumps and underfill. The change of the local deformation was measured by using a high resolution laser displacement...
Since the thickness of the stacked silicon chips in 3D integration has been thinned to less than 100 ??m, the local thermal deformation of the chips has increased drastically because of the decrease of the flexural rigidity of the thinned chips. The clear periodic thermal deformation and thus, the thermal residual stress distribution appear in the stacked chips due to the periodic alignment of metallic...
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