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Failure Analysis (FA) consists of fault verification, isolation, defect tracing, characterization and physical (elemental) analysis. It helps wafer fab to understand the root causes of low yield cases, drive the yield improvement activities. Due to the complexity of modern Integrated Circuits (ICs), defects causing the failure need more effort, a variety of FA tools to be identified. In this case,...
As the development of semiconductor process, more and more advanced technologies were applied in the IC manufacturing. The device becomes more precise, and more sensitive to the minor process variation. Failure analysis challenge comes along with these advanced processes. Lithography process is one of the most critical semiconductor processes. The issue with this process has its own property. Based...
As semiconductor technology advance, NVM memory structure find more and more application in the IC product. Majority part of NVM is charge-based where charge can be injected into or removed from a critical region of a device. This storage cell is normally floating and cannot be accessed directly. So the analysis on this floating structure is quite challenge, especially on the specific cell of the...
As the semiconductor technology keeps scaling down, Poly silicon gate pattern becomes more and more critical. If the Poly silicon variation is too big or some mismatch, it will induce severe logic parametric fail or even functional fail, whi ch is difficult for the failure analysis. For the analog device, it ca n induce functional fail. In this case, a function related failure was analyzed an d the...
Conventionally, Static Random Access Memory (SRAM) failures rely on memory bitmap for failure analysis. Static fault localization approach is ineffective except if the defect is large enough to cause a resistive short between the VDD and VSS nodes. However, it was observed that subtle defects that fall in the wordline (WL) of the pass gate transistor results in a partially turned-on NMOS with electroluminescence...
Reliability tests, such as High-Temperature Operating Life (HTOL), Hot Carrier Injection (HCI), Time Dependent Dielectric Breakdown (TDDB), etc., is required for the lifetime prediction of an integrated circuit (IC) product. Transmission Electron Microscopy (TEM) analysis is required to provide insights to the defect mechanisms, induced in the scaled gate oxide, by the above reliability tests. In...
This paper describes the effectiveness of using light induced Current Imaging — Atomic Force Microscopy (CI-AFP) to localize defects that are not easily detected through conventional CI-AFP. Defect localization enhancement for both memory and logic failures has been demonstrated. For advanced technology nodes memory failures, current imaging from photovoltaic effects enhanced the detection of bridging...
With continuous scaling in transistor size, there is demand to develop advanced FIB techniques for TEM failure analysis. Two techniques are reported here: 1) consecutive planar-cross section sample preparation for dual-direction TEM analysis and, 2) enhanced coating method for photo resists profile evaluation. Both the techniques have been successfully applied on deep sub-micron device issues which...
Flexible display module reliability were investigated herein with experiments, such as bending, twisting and ball drop. The pretests of all the three experiments were carried out firstly to primarily understand the flexibility and mechanical behavior of the display. Based on the pretest results, the corresponding fatigue test setup method and process were put forward. Then, the fatigue tests were...
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