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The coupling effect of stray AC (alternating current) + DC (direct current) and tensile stress-induced X70 pipeline corrosion is complicated with its mechanism uncovered. In this work, the corrosion behavior of X70 pipeline steel under three different corrosion (including an individual AC corrosion, mixed AC + 150 MPa tensile stress corrosion, coupling effect of AC + a 30 A/m2 DC interference and...
Fan-out wafer level package (FOWLP) technology becomes more attractive because of its flexibility for integration of diverse devices in a very small form factor. As FOWLP is composed of various materials, the proper structural and material selection designs are important to meet reliability requirements. In this study, thermal properties of FOWLP with different package structures were evaluated to...
Though Silicon Vias(TSVs) are regarded as a key technology to achieve three dimensional(3D) integrated circuit(IC) functionality. Annealing a silicon device with TSVs may cause high stress and cause TSV protrusion because of high Coefficient of Thermal Expansion(CTE) between silicon substrate and TSVs. The TSV wafers could be annealed right after copper plating process, or after chemical mechanical...
Though Silicon Vias(TSVs) are regarded as a key technology to achieve three dimensional(3D) integrated circuit(IC) functionality. Annealing a silicon device with TSVs may cause high stress and cause TSV protrusion because of high Coefficient of Thermal Expansion(CTE) between silicon substrate and TSVs. The TSV wafers could be annealed right after copper plating process, or after chemical mechanical...
Through silicon vias (TSVs) are regarded as one of the key enabling component to achieve three-dimensional (3D) integrated circuit (IC) functionality. In this paper, we present the investigation on TSV protrusion and stress at different annealing conditions tested by means of optical profiler and high efficiency micro-Raman microscopy. Finite element method is utilized to model and simulate the thermo-mechanical...
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