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This paper presents a methodology for reducing functional test time in subthreshold SoCs targeting ultra-low power (ULP) internet-of-things (IoT) devices. Due to their low operating speed and voltage, subthreshold SoCs require significantly longer time to test than traditional SoCs. The proposed method models trans-threshold correlations to allow high voltage, high speed testing while accurately predicting...
This paper presents a lossless sensor data compression accelerator for power reduction in wireless body sensors. First, a low complexity compression algorithm is demonstrated for the first time on electrocardiogram (ECG) and acceleration sensor data. Second, the algorithm is implemented as a custom hardware accelerator on a health monitoring driven System on Chip (SoC) in a 130 nm process. The accelerator...
A 507nW self-powered SoC is demonstrated for ultra-low power (ULP) internet-of-things (IoT) applications. The SoC includes ULP system-in-package (SiP) interfaces that enable its harmonious integration with a radio transmitter (TX) and a non-volatile memory (NVM). The energy harvesting platform power manager (EH-PPM) powers the SoC as well as off-chip components and is optimized for low quiescent power...
This paper presents a batteryless system-on-chip (SoC) that operates off energy harvested from indoor solar cells and/or thermoelectric generators (TEGs) on the body. Fabricated in a commercial 0.13 process, this SoC sensing platform consists of an integrated energy harvesting and power management unit (EH-PMU) with maximum power point tracking, multiple sensing modalities, programmable...
As energy-constrained systems continue to reduce their power consumption, Unding an optimal point of operation for the principle components in the energy budget becomes increasingly important. With energy dominant system components like communication circuits, it is important to consider both energy-per-bit and power in the context of the system's use cases. In this paper, we propose optimization...
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