The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
This paper proposes a unique method of an error detection and correction (EDAC) circuit, carried out using arithmetic logic blocks. The modified logic blocks circuit and its auxiliary components are designed with Boolean and block reduction technique, which reduced one logic gate per block. The reduced logic circuits were simulated and designed using MATLAB Simulink, DSCH 2 CAD, and Microwind CAD...
Current comparators are extensively used in current steering (CS) digital to analog data converters (DAC) which are used in almost all digital devices now days. With the growing demand for higher operation speed and longer battery life, it is crucial that the propagation delay and the power consumption of current comparator circuitry be further reduced. To this view in this research, a low power and...
A Bandgap Voltage Reference (BGR) circuit technique for lower voltage supply operation is presented. It eliminates the need of BGR core and resistors by integrating a two-stage cascode operational amplifier (op-amp) biased with a start-up circuitry with all-MOSFET transistors. The circuit is designed in 0.13μm CMOS process technology, produced a 179mV reference voltage at 27°C with 0.4V supply voltage...
Frequency divider is an important unit in phase-locked loop (PLL) which is widely used in RF frequency synthesizer. The divider circuit has been identified as the main contributor to PLL power dissipation. Therefore, frequency divider with low power dissipation is necessary. The objectives of this work are to design a frequency divider with low power dissipation which is able to operate under low...
Surface Plasmon Resonance (SPR) has become a popular method for the analysis of molecular interaction. There are many different approaches for the detection of SPR, however, the Phase detection method is quite sensitive in that it shows a much sharper change under SPR compared with other alternatives such as intensity and angle interrogation techniques. The SPR phase sensor can detect very low concentration...
This article presents a dual mode receiver architecture for Bluetooth and IEEE 802.11b standards at 2.4 GHz. In order to fulfill the increasing demand of data capacity, IEEE 802.11 WLAN is one of the most deployed technologies. On the other hand Bluetooth is imperative for wireless personal area network (WPAN) solution. Both standards use the 2.4 GHz band. The architecture specification was based...
Reference spur is a periodic noise that can be observed at the output of an integer-N phase-locked loop (PLL). This noise is dominated by circuit non-idealities in phase/frequency detector (PFD) and charge pump. The spur magnitude is linearly related with Voltage Controlled Oscillator (VCO) gain. Estimating this noise using transistor level simulation is time consuming. Therefore, in this paper we...
Phase-Locked Loops (PLLs) are a commonly used module in frequency synthesizers as part of RF transceivers. Simulating these modules is very time consuming. Therefore, a number of approaches to evaluate the performance of these modules through high level behavioural modelling are developed, where the focus is on the random noise aspect of these modules. In this paper, we introduce charge pump and Phase/Frequency...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.