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This paper focus on the implementation of configurable linear feedback shift register (CLFSR) in VHDL and evaluates its performance with respect to logic, speed and memory requirement in FPGA. Behavioral implementation of CLFSR in VHDL is configurable in terms of number of bits in the LFSR, the number of taps, positions of each tap in the shift register stage and seed value of LFSR. The target device...
A Viterbi algorithm for decoding of the convolutional code is a powerful method for controlling errors in data transmission over a noisy channel. It is based on maximum likelihood algorithm for decoding the data. However, the hardware implementation of Viterbi algorithm become crucial as it consumes large resources due to its complexity. This paper discussed the implementation of ½ rate convolutional...
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