The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
This paper describes a fast 128K × 8bit Pseudo Static RAM (PSRAM) using new circuit technologies, that is, a tunable delay design tactics, a current-mirror timer, and an optimized arbiter, all of which are applicable to general VLSI circuit design.
The hot-carrier problems are one of the most serious obstacles in making high-density, high-speed VLSI with sub micron geometry. Consequently, the MOSFET device level degradation under DC and AC stress has been investigated intensively in the past few years. However, little work has been carried out on the circuit level1. This paper deals with two new aspects of the circuit behaviors under AC hot-carrier...
The architectural aspects of a newly deveoped integrated cache memory is described in this paper, which includes 32Kbyte DATA memory with a typical ADDRESS to HIT delay, the largest memory size and fastest speed ever reported as an integrated cache memory[1]. The device integrates data/instruction memory, tag memory and a comparator on a chip. It serves as a cache memory of several host MPUs by aluminum...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.