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A two-stage D-band differential cascode power amplifier is presented, integrated using the IHP 0.13 pm SiGe BiCMOS technology. A compact layout of the cascode stage is proposed to minimize the parasitics contributing to potential instability, achieving 13 dB of gain/stage while operating at 46% of fT, using stage peaking. The PA is analyzed using Booth chart techniques showing that the amplifier can...
In this paper we present a high sensitivity total power radiometer front-end integrated in a 0.25 µm SiGe BiCMOS technology. The radiometer consists of a two-stage LNA co-integrated with a common-emitter square-law detector. Together these stages provide a peak responsivity of 61 MV/W and a 6 GHz system bandwidth around 56 GHz. An optimized non-50-Ohm impedance interface between the LNA and the detector...
The performance of on-chip passives and their application at mm-wave frequencies in two key silicon technologies are presented in this paper. Power and linear combiners designed in advanced 130 nm SiGe-BiCMOS and 65 nm CMOS-SOI are used as demonstrators. Multi-port transformer and shielded-CPW-on-SOI power combiners realize insertion loss as low as 0.5 dB and reflected port to port impedance uniformity...
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