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Soft errors caused by particle strikes are expected to increase as technology scales down. This is partially because more single-event transients (SET) are latched by memory elements at the primary output of combinational circuits. To speed up the assessment of SET-induced soft errors, we propose a systematic analysis method to examine the probability of a SET eventually being latched. In previous...
A collaborative method is proposed to detect soft errors in combinational logic and memory elements of sequential logic circuits. The proposed match functions examine the current flip-flop values and the incoming flip-flop inputs produced by combinational logic to recognize the presence of soft errors. Conventional error control methods for sequential circuits focus on protecting the memory elements,...
We propose a concatenate error detection method that exploits inherent information redundancy in network-on-chip (NoC) router, to address transient route computation errors. In our previous works, inherent information redundancy has been successfully employed to management transient errors in routers using XY deterministic routing algorithm. To prevent misrouting caused by transient errors injected...
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