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Good energy efficiency and area efficiency are both achieved for the presented 9-bit 35MS/s SAR ADC, by using customized small-value capacitors in a splitting monotonic switching scheme, a simplified dynamic digital logic and a self-clocked dynamic comparator. With built-in configurable gain, the ADC maintains its peak SNDR over a wide input range, featuring more flexibility. Fabricated in a 65nm...
A low noise single-ended to differential linear switched capacitor variable gain amplifier (SC-VGA) is designed in a 0.18μm CMOS technology for 4MHz center frequency (fs) 26-MHz ultrasound imaging. To fit the higher source impedance from gradually scaled piezo-electric transducers (PZT) in ultrasound imaging systems, a charge sampling amplifier with a fixed integration time as the first stage exhibits...
A low noise single-ended to differential linear two-stage switched capacitor variable gain amplifier (SC-VGA) is designed in a 0.18μm CMOS technology for 4MHz center frequency (fc) ultrasound imaging. To simplify the clock generator and improve linearity, the voltage sampling technique is adopted to replace the charge sampling for sake of the source impedance of piezo-electric transducers (PZT) not...
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