A low noise single-ended to differential linear two-stage switched capacitor variable gain amplifier (SC-VGA) is designed in a 0.18μm CMOS technology for 4MHz center frequency (fc) ultrasound imaging. To simplify the clock generator and improve linearity, the voltage sampling technique is adopted to replace the charge sampling for sake of the source impedance of piezo-electric transducers (PZT) not being as high as capacitive micro-machined ultrasonic transducers (CMUT) in ultrasound imaging systems. The two-stage VGA based on a single-stage OTA in each stage to save the power, and controlled by the 10-bit digital signals, has the maximum dB-in-linear gain varied from −14dB to 32dB. The first stage converts the single-ended input to differential outputs with a 2-bit 6dB/step coarse gain control varying from 0dB to 18dB, and the second stage has a fine gain control which exploits an 8b binary capacitor (CAP) array varying from −14dB to 14dB. For reducing the capacitance spread for a binary-weighted 8b (1:256) CAP array, the array is divided between the upper 4b and lower 4b by a divider capacitor. Simulation results show the core analog part of two-stage VGA consumes 900μA at 1.8V, has HD2 −61dB, HD3 −77dB at 190mV output Vpp, and the input referred noise (IRN) is √ at 4MHz at the maximum gain and a sampling frequency (fs) of 30MHz. The layout size is 387μm×502μm.