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A power-rail electrostatic discharge clamp circuit with transient and static hybrid-detection enhanced triggering is proposed in this work. By skillfully co-optimizing the driving paths of both transient and static detection networks, the proposed circuit achieves a clamp device transient response time over 2 times longer than its RC time constant, which endows the proposed circuit with both promoted...
A novel low-power and high-speed dual-modulus prescaler based on extended true single-phase clock (E-TSPC) scheme is presented. By restricting the short-circuit current in noncritical branchs, the design reduces the major source of power dissipation in E-TSPC scheme. The presented design enhances the maximum working frequency with shorter critical path and lower load capacitances. Simulation results...
This work presents a novel power-rail electrostatic discharge (ESD) clamp circuit for nanoscale applications. By skillfully incorporating transient and static ESD detection mechanisms into its detection circuit, the proposed circuit achieves a wide range of adjustable triggering voltage (Ft1) while maintaining low standby leakage current (Ileak). Besides, the proposed circuit achieves significantly-improved...
We propose an energy-efficient diffusion strategy where each node performs the combination step in the diffusion LMS strategy only at every L time slots. This proposed strategy reduces the inter-node communication overhead by L-fold, but yields a steady-state network mean-square deviation (MSD) higher than the traditional diffusion LMS strategy. To improve the steady-state network MSD performance,...
Double snapback phenomena in transient power-rail ESD clamp circuits are reported in this paper. By properly sequencing different snapback mechanisms, the reported double snapback phenomena present latch-up free ESD protection schemes. Experiment results verify that both the first holding voltage (Vh1) and second holding current (Ih2) meet latch-up free criteria for the utilized 65-nm CMOS process...
In this work, new design techniques that aim to reduce power consumption of true single-phase clock-based (TSPC) prescalers is presented. The structure of divide-by-4/5 frequency divider is simplified, and its performance is compared with previous work to demonstrate the improvement. Simulation results show at least a 25% reduction of power consumption is achieved by the proposed unit. In the 32/33...
Wireless sensor networks (WSNs) which powered by batteries are widely used in military, healthcare, and scientific environments. One important challenge for setting WSN is the energy problem. Power management is one of efficient solutions for such problem and must be taken into account at all levels of the WSN. However, the power management may be out of action when the WSN suffers malicious attacks...
The IEEE 802.11p/1609 standards specify a suite of communication protocols for vehicular communication networks. One control channel and six service channels are used in such a network. Ideally, the data transmission load generated by all service providers and their user stations should be spread over all of the six service channels evenly to fully utilize the aggregate bandwidth of these service...
In this paper, we use the NCTUns network simulator to study intelligent traffic signal control algorithms. NCTUns is both a microscopic traffic simulator and a network simulator. We imported the real-life map of a district of the Taipei city into NCTUns to let simulated vehicles move on the roads of the imported map. Then, we used a new and unique feature of NCTUns - each simulated vehicle moves towards...
This paper attempts to explore students¡¦ collaborative learning behavior patterns in different simulation systems. Two mobile CSCL learning environments (Augmented Reality simulation and Traditional simulation) for helping university students to acquire physics knowledge were designed. A total of 40 students, grouped into twenty pairs, were randomly assigned to the two learning environments for conducting...
By using virtual reality and simulation technology, hydraulic engineering aided design is studied, which includes structures' three-dimensional simulation prototype, design knowledge base containing design criterion and optimization strategy, and human-computer interaction. According to hydraulic engineering design flow, hydraulic engineering aided design platform is developed to realize 2D and 3D...
The wire-guidance plus wake-homing torpedo requires special requirement on entrance wake distance to capture and track the target wake. Because of the limited guidance principle, the entering-wake distance depends on the battlefield situation when using the azimuth method. The guiding method through keeping distance reduces the effect of battlefield situation. However, the entering-wake distance is...
In this decade, peer-to-peer (P2P) applications have emerged as popular tools for sharing data and they have gained much attention. Such P2P applications build overlay networks on top of existing infrastructure networks and disseminate data in a peer-to-peer manner. How well the P2P overlay network maps onto the underlying physical network topology can significantly impact P2P application performances...
The Microwave Circuit is an important course for the college students on specialty of radio and communication. But both teaching and learning of this course have great difficulty as a result of so much abstract concept, especially for undergraduate students. Some steps for reform using computer-aided design (CAD) tools with relative syllabus are proposed later. And some strategies are found to be...
A compact FSS (frequency selective surface) filter will be designed in this paper. The length of the filter is reduced by the use of both bandpass and bandstop FSSs. A sample filter at 8.05 GHz will be designed using CST Studio as an example. Simulation results show that the FSS filter has a bandwidth of 800 MHz and a reflection lower than -20 dB. Tested results from this sample filter agree well...
An 8-bit 200 MHz low-power CMOS folding and interpolating analog-to-digital converter is presented. A novel mixed-averaging distributed T/H circuit is proposed to decrease the nonlinearity error of the ADC. The DNL/INL is 0.3/0.2 LSB according to MATLAB simulation results. This ADC is implemented in 0.5 um CMOS technology and the total power dissipation is merely 96 mW at a sampling rate of 200 MHz.
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