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Pore wall thinning of mesoporous 4H‐SiC by sacrificial oxidation is performed. The dimensions within the as‐etched porous SiC are reduced during dry oxidation at 1100 °C by consuming SiC and removing the grown SiO2 in the subsequent hydrofluoric acid (HF) dip step. The process reduces the average pore wall thickness from 27 nm to approximately 16 nm and reduces the thickness standard deviation from...
In this paper, we propose a fabrication process of Strained Silicon MOSFET incorporating Dielectric Pocket (SDP-MOSFET). By employing TCAD tools, a systematic process simulation in realizing the SDP-MOSFET structure is done successfully. By using vertical and horizontal doping profiles, 120 nm gate length with 12 nm gate oxide of the device is observed respectively. The combination of a Silicon Germanium...
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