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This paper describes the design of a 25 Gb/s energy-efficient CMOS optical receiver with high input sensitivity. By incorporating a current-boosting preamplifier with a dual-path time-interleaved integrating-type optical receiver, it provides 1:2 demultiplexing operation with a tolerance to lower bandwidth photodiodes. The bandwidth of current amplifier is chosen as $0.35\times $ operating data...
Multi-channel, fully integrated CMOS optical receivers combining with spatially modulated photo detector (SMPD) array, transimpedance amplifiers, and limiting amplifiers are presented. It demonstrates scalable channel numbers with minimum area overhead and low cross talk of less than 0.1 dB. The receiver array is implemented in 0.18 μm CMOS and provides 20 Gbps throughput (5Gbps × 4). The conversion...
This paper describes a 25-Gb/s energy-efficient CMOS optical receiver with high input sensitivity. By incorporating a current boosting preamplifier with time-interleaved integrating-type optical receiver, it also circumvents CID issue with high PD bandwidth tolerance. Experimental results show that the receiver can achieve 25-Gb/s operation by integrating with a 9-GHz or 17-GHz GaAs PD. Input sensitivities...
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