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A design of opamp-sharing multiplying digital-to-analog converter (MDAC) used in the successive stages of an 80MS/s 14-bit pipelined analog-to-digital converter (ADC) with 1.8V supply voltage is presented in this paper. Opamp-sharing structure of the paper is proposed to achieve low-power operation, and SC-CMFB (switch capacitor-common mode feedback) circuit further reduces power consumption. The...
This article advocates a novel network architecture and associated location-based reconfiguration algorithm for the future wireless communications network. In contrast to the dominating cellular architecture, the new form envisions a logical overlapped framework with traditional cellular communication, centrally controlled short-range communication and "Store-Carry-Forward" short-range communication...
Based on the primary physical infrastructure of traditional cellular mobile communication network, this paper provides an overlapped variable logical structure with conventional communication, point to point direct communication and point to multi-point direct communication modes according to the type of services. In particular, a signaling-based reconfiguration technique is proposed to adaptively...
A low power consumption, high speed op-amp is designed for a 10-bit, 100 MSPS parallel pipeline A/D converter. The op-amp plays an important role in the ADC, because its conversion rate and power consumption are limited by the performance of the op-amps. The designed ADC in this paper employs parallel architecture based on double sampling technology, and shares the op-amp between the same stages of...
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