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The Phase Locked Loop (PLL) has become an important part of electrical systems. When designing a PLL, an efficient and reliable simulation platform for system evaluation is needed. However, the closed loop simulation of a PLL is time consuming. To address this problem, in this paper, a new PLL model containing both digital and analog parts based on SystemC/SystemC-AMS (BETA version) is presented....
Wireless body-area networks (WBAN) are used for communication among sensor nodes operating on, in or around the human body, e.g. for healthcare purposes. In view of energy autonomy, the total energy consumption of the sensor nodes should be minimized. Because of their low complexity, a combination of the super-regenerative (SR) principle [1-3] and OOK modulation enables ultra low power (ULP) consumption...
The main bottleneck to achieve energy autonomy in body area networks (BAN) is the design of an ultra low power yet reliable wireless system. In this paper, we first demonstrate the feasibility of an ultra low power receiver by presenting our implemented receiver chip that could operate on a total power of 479.5 uW, which is more than one order of magnitude lower than commercially available low power...
This paper presents an ultra low power superregenerative RF front-end for wireless body area network (WBAN) applications. The RF front-end operates in the 2.36-2.4 GHz medical BAN and 2.4-2.485 GHz ISM bands, and consumes 500 μW. It supports OOK modulation at high data rates ranging from 1-5 Mbps. It achieves a sensitivity of -67 dBm at a BER of 10-3. The combination of digital and analog quench generation...
This paper presents the design and implementation of a variable gain amplifier with an ultra low-power consumption of 56μW. This is achieved by using sub-threshold operation, 1V power supply and a minimum amount of current branches. After system-level optimization, a gain range of 47dB is implemented with 6dB per step programmability. The SNDR is better than 33dB for all gain settings, while the nominal...
An envelope detector-based wake-up receiver front-end is presented. A double-sampling technique is implemented to suppress the 1/f noise and DC offset, resulting in a lower output noise level and therefore a better SNR for a given input level. The receiver consumes 51 μW and occupies 0.36 mm2 in 90 nm CMOS. For 10 kb/s 00K reception it achieves -69 dBm and -80 dBm sensitivity at 2.4 GHz and 915 MHz...
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