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High-performance CMOS-FinFET with dopant-segregated Schottky source/drain (DS-Schottky S/D) technology has been demonstrated. Thanks to the low parasitic resistance in DS-Schottky S/D, high drive current of 960 muA/mum was achieved for nFET with Lg = 15 nm and Wfin =15 nm at Vd= 1.0 V and Ioff= 100 nA/mum. Furthermore, the propagation delay time has been successfully improved down to less than 5 ps...
Integration schemes of bulk FinFET SRAM cell with bulk planar FET peripheral circuit are studied for the first time. Two types of SRAM cells with different beta-ratio were fabricated and investigated in the view of static noise margin (SNM). High SNM of 122 mV is obtained in the cell with 15 nm fin width, 90 nm channel height and 20 nm gate length at Vdd = 0.6 V. This is the smallest gate length FinFET...
We present the FinFET process integration technology including improved sidewall transfer (SWT) process applicable to both fins and gates. Using this process, the uniform electrical characteristics of the ultra-small FinFETs of 15nm gate length and 10 nm fin width have been demonstrated. A new process technique for the selective gate sidewall spacer formation (spacer formation only on the gate sidewall,...
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