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This paper summarizes our approaches which synthesize the optimum electromagnetic (EM)-wave environment around various silicon devices, in order to maximize the device efficiency with minimum passive loss and footprint. This has enabled multi-mW THz radiation in standard silicon processes. Various critical capabilities for future THz microsystems, including integrated phase locking, multi-pixel coherent...
This paper describes a complete process/design co-optimization methodology based on Fully Depleted SOI (FDSOI) technology. A process optimization is detailed through significant effective capacitance reduction, in order to optimize jointly frequency/leakage ratio and high frequency performances. In this objective, an efficient and low cost offset-spacers morphology has been designed to achieve maximum...
Extracting useful information from human bio potentials is an essential component of many wearable health applications. Yet the feature extraction itself can be computationally demanding, and may rapidly exhaust the meager energy supply available to the sensor node. General-purpose time-frequency analysis techniques, such as the Discrete Wavelet Transform (DWT) are widely used, but are computationally...
A 108GS/s track-and-hold amplifier manufactured in a 55nm SiGe BiCMOS technology achieves 40GHz bandwidth with THD and SFDR of −49 dB and 55 dB, respectively. This performance is made possible by the use of a new MOS-HBT quasi-CML switch operating in class-AB mode, which results in an overall power consumption of 87 mW from 2.5V and 1.8V power supplies. The circuit targets time-interleaved ADC front-ends...
A low-noise, broadband amplifier with resistive degeneration and transimpedance feedback is reported with 200 mVpp input linearity and less than 6 dB noise figure up to 88 GHz. The measured gain of 13 dB, noise figure, linearity, and group delay variation of ±1.5 ps are in excellent agreement with simulation. Eye diagram measurements were conducted up to 120 Gb/s and a dynamic range larger than 36...
This paper demonstrates an IPv6 self-powered bidirectional wireless network system solution, compatible with indoor conditions, based on a IEEE 802.15.4/802.14.4e 2.4GHz radio (5.4mA Rx / 7.3mA Tx) and a 130nA quiescent current Power Management Unit (PMU). Other key elements are a 32bits Cortex M3 microcontroller and MEMs for sensors. This chipset enables self-powered sensors and actuators as well...
This paper presents a methodology for selecting the architecture and optimizing the circuit design for the first block in a current-mode receiver chain, the low noise transconductance amplifier (LNTA). This methodology includes system-level considerations to select circuit design techniques for noise cancellation, linearity improvement and power reduction. The methodology is applied on an LNTA design...
In this paper, we present several antenna-array topologies for quadrature spatial combining: In-phase and Quadrature signals are not anymore combined at the circuit level but rather spatially in free space. To demonstrate the feasibility of this concept, an organic module with two 4×1 antenna-arrays is fabricated and measured in V-band. Reflection coefficient and realized gain measurements are very...
This paper reports on the impact of antenna impedance frequency characteristics on a broadband low-NEP operation of THz MOSFET direct detectors. New Si-lens integrated high-impedance on-chip ring antennas were developed based on a systematic co-design procedure with MOSFET device. They allowed achieving the world record values both in terms of responsivity and noise equivalent power for detector arrays...
This paper reports on co-design between CMOS direct detectors and silicon lens-integrated on-chip antennas. Due the appropriate impedance characteristics of the differentially driven antenna, broadband detector operation over multiple hundred GHz centered around 900 GHz could be achieved. The overall pixel layout is fully compatible with an industry qualified CMOS technology.
This paper presents a lens-integrated terahertz imaging detector implemented in a 65 nm bulk CMOS process technology. The back-side illumination through a silicon lens increases the imaging SNR by 7–15 dB. The broadband detector design has been verified from 0.6 to 1 THz. At 1 THz the circuit achieves a noise equivalent power (NEP) of 66 pW/sqrt(Hz) and a responsivity (Rv) of 800 V/W for back-side...
A phase noise measurement bench is integrated on a 3.6 mm2 silicon chip. The bench includes a splitter with quadrature outputs, a phase detector, a low noise baseband amplifier and, if necessary, a synthesized source. Applications to the characterization of frequency sources and BAW resonators are discussed.
The ever-increasing cost of healthcare and the aging of population are driving the development of diagnostic tests and drug delivery systems that determine an individual's therapeutic responsiveness and enable a more efficient therapy, saving healthcare dollars and giving patients better choices. The targeted personalized medicine also represents a huge market (estimated at about $232 billion for...
This paper presents a fully integrated 60GHz transceiver module in a 65nm CMOS technology for wireless high-definition video streaming. The CMOS chip is compatible with the WirelessHD™ standard, covers the four channels and supports 16-QAM OFDM signals including the analog baseband. The ESD-protected die (9.3mm2) is flip-chipped atop a High Temperature Cofired Ceramic (HTCC) substrate, which receives...
A 4× oversampling 18th order digital FIR filter suitable to replace all analog baseband filters in a mobile high-data-rate wireless communication transmitter is presented. Special architecture optimizations allow an estimated output sampling rate of 10Gs/s in 65nm CMOS while respecting full spectrum mask specifications of the ECMA & IEEE standards over the radio band of 8 GHz.
This paper presents a 60 GHz antenna structure built on glass and flip-chipped on a ceramic module. A single antenna and a two antenna array have been fabricated and demonstrated good performances. The single antenna shows a return loss below −10 dB and a gain of 6–7 dBi over a 7 GHz bandwidth. The array shows a gain of 7–8 dBi over a 3 GHz bandwidth.
In the millimeter wave (mmWave) frequency range, the recent advances in CMOS and BiCMOS technologies make possible the integration of entire RF front-ends on the same chip (System on Chip (SoC) approach). The present challenge concerns the antenna integration within the packaging (System in Package (SiP) approach) which will support the complete analog and digital system. Integrated antennas on silicon...
A differential digital to 60 GHz quadrature mixer on a 65 nm SOI CMOS process from STMicroelectronics has been designed. Two 5 GS/s 4-bit quadrature base band signals are fully decoded and fed into an unary-weighted current DAC. The DAC output is fed to two RF Gilbert cell mixers driven by an off-chip 60 GHz LO signal. The simulated P1dB output power is -22.5 dBm for an LO power of -2 dBm at 60 GHz...
This paper presents a 60 GHz 65 nm CMOS RMS power detector to be used in a Power Amplifier regulation loop. The presented test-chip integrates also a differential capacitive coupler sensing the RF voltage on a differential transmission line. The circuit shows 25 dB of linear detection range at 60 GHz, well enough to cover a VSWR of up to 7:1 caused by antenna impedance mismatch while still having...
This paper reviews recent research conducted at the University of Toronto on the development of imaging and radio transceivers in CMOS, aimed at operation in the 100-GHz to 200-GHz range. Two receivers fabricated in 65-nm GPLP CMOS technology are described. The first is a 90-100 GHz IQ receiver with 7-dB noise figure, 10.5-dB downconversion gain and fundamental frequency VCO. The second receiver has...
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