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This paper presents a recently developed dynamic stereo vision sensor system and its application for fall detection towards safety for elderly at home. The system consists of (1) two optical detector chips with 304×240 event-driven pixels which are only sensitive to relative light intensity changes, (2) an FPGA for interfacing the detectors, early data processing, and stereo matching for depth map...
In this paper a performance evaluation of a fast stereo matching algorithm on embedded and multi-core hardware is given. The algorithm is based on the census transform and adapted to the needs of real-time capability and embedded systems. The main focus lies on high frame rates and low memory consumption. On a standard PC with 4 cores a frame rate of 19 fps, on a GPU a frame rate of 39 fps and on...
Stereo vision has become a very interesting sensing technology for robotic platforms. It offers various advantages, but the drawback is a very high algorithmic effort. Due to the aptitude of certain non-parametric techniques for field programmable gate array (FPGA) based stereo matching, these algorithms can be implemented in highly parallel design while offering adequate real-time behavior. To enable...
Sensor systems for robotics and autonomous systems usually require small-sized and power-aware dedicated solutions for their realization. Therefore, an embedded system is the first choice - but the drawback is weaker computing power compared to state-of-the-art PC-based systems. This paper describes our approach on "boosting" the computing power of embedded vision systems. Our system consists...
This paper presents the hardware implementation of a stereo vision core algorithm, that runs in real-time and is targeted at automotive applications. The algorithm is based on the sum of absolute differences (SAD) and computes the disparity map using 320 times 240 input images with a maximum disparity of 100 pixels. The hardware operates at a frequency of 65 MHz and achieves a frame rate of 425 fps...
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