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We fabricated highly stressed FDSOI pMOSFETs down to 15nm gate length. The impact of different stressors (CESL, raised sources and drains, STI) is studied for different device geometries and channel orientations (<100> or <110>). We evidence that pMOSFETs along <110> are more sensitive to stress: STI degrades narrow devices compared to wide ones whereas compressive CESL (−3GPa) and...
A detailed study of performance in uniaxially-strained Si nanowire (NW) transistors fabricated by lateral strain relaxation of biaxial SSOI substrate is presented. 2D strain imaging demonstrates the lateral strain relaxation resulting from nanoscale patterning. For the first time, an improvement of electron mobility in SSOI NW scaled down to 10nm width has been successfully demonstrated (+55% with...
For the first time, low temperature (LT) anneal at 625°C has been demonstrated for dopants activation enabling similar ION/IOFF trade-off as standard spike anneal (>1000°C), down to 30nm gate length (LG) for both n&p FETs. Similar short channel effect control has been achieved in LT n&p FETs as its high temperture (HT) counterparts. Influence of dopant implant tilt on LT device performance...
For the first time, we extensively review to which extent ion implantation is viable for the design of n-FET transistors with gate length down to 20nm in a FDSOI technology. Three implantation schemes are covered and their potential and limitations are presented in terms of technological challenges and electrical performance.
We fabricated highly stressed FDSOI nMOSFETs down to 18nm gate length. The impact of different stressors (CESL, STI) is studied for different device geometries and substrates orientation (<100> or <110>). We evidence that STI degrades wide devices of intermediate gate length (0.2μm<LG<1μm) along <100> compared to <110> (−20% mobility) whereas short nMOSFETs are improved...
Ultra-thin body with ultra-thin buried oxide (UTBB) n-channel devices on silicon-on-insulator platform with and without ground plane are characterised over a wide frequency range. Self-heating effect and source-to-drain coupling through the substrate clearly manifest themselves through the output conductance variation with frequency. In this work, we experimentally show that introduction of a p-type...
We study the influence of remote Coulomb scattering (RCS) due to trapped charges at the silicon oxide/high- kappa material interface on the electrical performances of silicon nanowire (Si-NW) FETs. We address a full quantum analysis based on the 3-D self-consistent solution of the Poisson-Schrdinger equation within the coupled mode-space non-equilibrium Green's function (NEGF) formalism. We find that...
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