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The past decades have witnessed tremendous research efforts devoted to parallel architectures and programming models for natively computing in space. This resulted in systems which comprise a number of processing units ranging from compact Boolean function generators (FPGAs look-up-tables) to full-fledged microprocessors (MPSoCs). It is often stated in the literature of both areas that performance...
In this article, we present an original MPI-based adaptive task migration support for the HS-Scale system. Our previous communication API was modified in order to be MPI compliant. In order to enable task migration without any MMU, a Position Independent Code compilation technique is implemented. The self-adaptability is based on monitoring information collected at run-time by each processing element...
Scalability of architecture, programming model and task control management will be a major challenge for MP-SOC designs in the coming years. The contribution presented in this paper is HS-Scale, a hardware/software framework to study, define and experiment scalable solutions for next generation MP-SOC. The hardware architecture, H-Scale, is a homogeneous MP-SOC based on RISC processors, distributed...
Multi-processors systems-on-chip (MPSoCs) are becoming increasingly popular in embedded systems for the high degree of performance and flexibility they permit. While most MPSoCs are today highly heterogeneous for better fitting the target applications, homogeneous systems may become in a near future a viable alternative bringing other benefits such as run-time load balancing. The work presented in...
Multiprocessor systems-on-chip are becoming increasingly popular in embedded systems for the high degree of performance and flexibility they permit. While most MPSoCs are today highly heterogeneous for better fitting the target applications, homogeneous systems may become in a near future a viable alternative bringing other benefits such as run-time load balancing, high performance and low power consumption...
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