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As we known, the measurement of junction-to-case thermal resistance (Rth-JC) of semiconductor power devices is very important. In this paper, an approach of transient dual interface method (TDIM) with gate-source voltage (Vgs) as the temperature sensitive electrical parameters (TSEP) was investigated for the measurement of Rth-JC of packaged SiC MOSFET. The measured Rth-JC value of packaged SiC MOSFET...
This paper presents new results revealing the electrical properties of the silicon-on-polycrystalline silicon carbide hybrid substrate. The thermal resistance in the substrate was measured and compared to simulations and is linked to the measured reduced self-heating in LDMOS transistors. The mobility in the device layer was extracted and shows slightly lower values in the hybrid compared to the SOI...
First ever demonstration of LDMOS transistors on Sion-SiC hybrid substrates. No degradation in transistor performance as compared to conventional SOI. PolySiC is available in larger wafer sizes but seems to have slightly lower heat conductivity than crystalline SiC. The intermediate alpha-Si layer provides electrical advantages and does not form any thermal barriers.
Thermal characterization of the new Si-on-SiC hybrid substrate has shown thermal properties superior in comparison with SOI. The thermal resistivity was shown to be a factor of four lower, and the lateral thermal spread was much more efficient, as is explained by the excellent heat conductivity of the SiC substrate. These results correspond well to the absence of MOSFET self-heating effects for the...
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