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Based on simulation results, we show that defects at the Si/Box interface of FDSOI transistors can have a detrimental impact on reliability. In particular, attention is paid to Hot Carriers degradations (HC) on ultra thin film FDSOI NMOSFETs for which defects can be created very close to the back gate interface. A new technique based on capacitance measurements is proposed to localize HC degradation...
We present the shortest and narrowest high-κ/metal gate n- and pFETs on compressively strained enriched SiGe On Insulator (c-SGOI) reported to date (LG=20nm; W=30nm; TSiGe=15nm). The range of active area widths in this work allows observing the transition from biaxial to uniaxial stress due to lateral elastic strain relaxation, and its benefit down to 20nm gate length on hole mobility and pFET performance...
A novel method is proposed to extract interface state density Dit at both front and back gate interfaces. This accurate technique based on CV and GV measurements, enables to measure low Dit densities ~1010 traps/cm2/eV, at both interfaces on standard FDSOI transistors. In particular, it was found that DitBG is very low ~3.1010 traps/cm2/eV, and about one decade smaller than DitFG = 5.1011 traps/cm...
The extraction of the trap density on Ge/gate-stack (top) and Ge/BOX (bottom) interfaces of germanium-on-insulator pMOSFETs is shown using the Lim & Fossum model historically developed for fully depleted SOI devices. The doping and the thickness of the Ge film do not change significantly the top interface trap density. The bottom one is slightly raised by doping the Ge film. This method can be...
This paper investigates the impact of crystallinity of HfO2 oxides on VT instabilities. Wet etch rate measurements enhances a critical thickness tHKC for HfO2 which marks the transition between a monoclinic crystalline phase to a near amorphous state, both clearly identified by ATR FTIR. Using electrical measurements and modeling, it is demonstrated that this transition from the crystalline phase...
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