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This paper reports on the technology and design aspects of an industrial DHEMT process for 650V rated GaN-on-Si power devices, using an in-situ MOCVD grown SiN as surface passivation and gate dielectric, with low interface state density and excellent TDDB. Optimization of the GaN epi stack results in very low off-state leakage (<10nA/mm). Due to the reduction of buffer trapping, low dynamic Ron...
This paper reports on an industrial DHEMT process for 650V rated GaN-on-Si power devices. The MISHEMT transistors use an in-situ MOCVD grown SiN as surface passivation and gate dielectric. Excellent off-state leakage, on-state conduction and low device capacitance and dynamic Ron is obtained. Initial assessment of the intrinsic reliability data on the in-situ SiN is provided.
We have studied and optimized the breakdown voltage of enhancement-mode n-channel GaN hybrid MOS-HEMTs on sapphire substrate. These MOS-gated transistors, with different Mg doped p-type GaN layer underneath the unintentional doped AlGaN/GaN layer, have breakdown voltage as high as 1300 V using a dielectric isolation (DI) RESURF approach.
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