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This paper presents a 40–80 Gb/s quarter rate PAM4 wireline transmitter. The transmitter incorporates a 2-tap feed-forward equalizer (FFE) based on multiple-multiplex (MUX) and a parallel PRBS7 generator. The transmitter is achieved in 65nm CMOS technology and supplied with 1.2V. The simulation results show that the proposed transmitter can work at 40–80 Gb/s with 4-level pulse amplitude modulation...
This paper introduces a fully-integrated wireline transmitter operating at 40Gb/s. The transmitter incorporates a combiner of 64:1 MUX and 2-tap Feed-Forward-Equalizer (FFE). The transmitter is achieved in 65nm CMOS technology. The simulation results show that the proposed transmitter can work at 40Gb/s with a −11dB RLGC channel. The simulation power consumption is 76 mW under 1.08V supply, and the...
This paper introduces a fully-integrated wireline transmitter operating at 28Gb/s. The transmitter incorporates a 3-tap Feed-Forward-Equalizer (FFE) with Flipflop-based delay to equalize the channel. T-coil networks are used with ESD protection circuits at transmitter's output to realize impedance matching and bandwidth enhancement. The transmitter is fabricated in 65nm CMOS technology. The measurement...
This paper presents a 40Gbps SerDes transceiver consuming only 190mW power. The transmitter employs serializing time window search technique and 2-tap pre-emphasis. The receiver implements power-efficient front-end circuits including current-integrating FFE and cascaded dynamic comparators. The CDR employs a bang-bang phase detector, and the integral path and proportional path are separated. Fabricated...
This paper presents a 40 Gb/s (38.4-to-46.4 Gb/s) half rate SerDes transmitter with automatic serializing time window search and 2-tap pre-emphasis. By implementing a serializing time window search loop, the serializing timing is guaranteed and circuits running at the highest speed such as latches for retiming and clock tree buffers for delay matching are eliminated. A divider-less sub-harmonically...
This paper describes the co-design of equalizers for 40Gb/s transceiver. A feed forward equalizer (FFE) is applied to the transmitter, while an adaptive continuous time linear equalizer (CTLE) is applied to the receiver. The innovation is that both equalizers cooperate with each other to equalize the channel, and T-coil networks are used with ESD protection circuits in both transmitter's output and...
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