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This paper describes an adaptive UHF radio frequency identification (RFID) analog front end designed in 130nm CMOS process. The main purpose is to extend communication range between the tag and reader complying with EPC Gen2 standard. The proposed adaptive architecture increases the effective range. An ASK demodulator (PR-ASK compliant) and a backscattering modulator are proposed to insure the communication...
The current paper proposes a low emission media access control (MAC) compliant frequency shift keying modulator to operate within wireless body area networks (WBANs). Frequency modulation is achieved by utilizing a ramp to encode the bit stream into two distinct frequencies. The negotiated frequency of operation for dynamic frequency shifting and frequency encoding is achieved changing the gradient...
In this paper, the design of a low-power continuous-reset CMOS charge-sensitive amplifier (CSA) is presented. The proposed CSA is intended for capacitive sensor readout circuits, in particular, interface circuits for solid-state detectors used in medical imaging and X-ray spectroscopy. A proof-of-concept interface circuit is designed and fabricated in a 0.13-µm CMOS process and consists of the proposed...
This paper presents some techniques to synthesize pulses in the context of IR-UWB. Pulse synthesizers are good candidates when different kinds of pulses are needed to comply with different standards or when the shape of the pulses needs to be modified. Two different approaches are described here. Voltage Controlled Delay Line (VCDL) based pulses are first described. For this family, two kinds of combiners...
In this paper, we present a low-power, low-noise and wide dynamic range biosensor for neurotransmitter detection that exhibits high sensitivity and linearity. The design uses a fully differential difference amplifier (FDDA) to decrease the number of amplifiers in the control part, with reduced overall power consumption as a result. Moreover, this amplifier provides an output voltage swing that is...
In this paper, we present the analysis, design, and characterization of wireless power transfer (WPT) systems that use planar and conical coils. It is shown that the conical coils have superior performance in terms of self-resonant frequency and quality factor as compared to their planar coil counterparts. A power transfer efficiency of up to 53.9% is achieved for a 4-coil WPT system employing conical...
This paper presents the implementation, the layout and the post-layout simulation of two main blocks of the FM-UWB transmitter; the voltage-controlled oscillator (VCO) and the subcarrier generator. A low power and linear ring VCO is proposed to generate the RF signal. A low power PLL based BFSK subcarrier generator is introduced. It includes a linear relaxation oscillator to produce the subcarrier...
Decimation filter for sampling rate alteration in sigma delta converters is generally designed using cascaded integrator comb CIC structure. The frequency response of the structure is sinc function that exhibits poor stop band characteristics which thereby require additional compensation filter stages. This paper presents two-way interleaved multistage CIC structures for even decimation factors. Among...
A fully synthesizable digital low drop-out regulator (LDO) with dual (coarse/fine) loops control is proposed. This structure employs a synchronized comparator to compare the feedback voltage (Vfb) and the desired reference voltage (Vref). A coarse loop is used to simplify the control logic circuit and increase the LDO response speed during the output dynamic transit. A fine loop is used to minimize...
A sparse-iteration 4D CORDIC (COordinate Rotation DIgital Computer) has recently been developed for multiplying hypercomplex numbers one of which is a constant coefficient. This novel solution allows for implementing area-efficient quaternion multipliers in ASIC and FPGA. This paper shows how to extend the sparse-iteration CORDIC circuit so as to allow it to compute various products related to one...
In this paper a specific implementation of the transceiver controller is presented, based on a high speed serial interface (HSSI) protocol-JESD204B. The implementation of this protocol provides less pin counts, lower complexity and more accurate timing control than the traditional parallel data transportation from ADC to DAC. This paper gives a design of the transceiver controller and the verification...
A defined, straightforward top-down design method is proposed for developing inherently-stable, fast-settling high-order amplifiers. The method effectively defines the closed-loop response for a multistage amplifier through a desirable transfer function, such as of a time-domain filter, and combines an efficient gm-based procedure to implement a compact corresponding CMOS circuit. The amplifier will...
A digitally controllable stabilization technique for bandwidth-enhanced shunt-feedback (SFB) transimpedance amplifiers (TIA) with active Gm-feedback is proposed. The Gm-feedback programmability uses a switchable tail current network to digitally control the global TIA phase margin and correct for any instability resulting from device modeling imperfections, unconsidered layout parasitics or PVT variations...
The paper describes operation and design of a memory retention LDO regulator. The LDO regulator is operating in a very wide range of the output currents (up to 100 uA) with a very small quiescent current (in the range of 100–300 nA). In the proposed circuit this range is achieved using a nonlinear translinear cell added to the the unity gain stage (voltage follower). The cell provides the load controlled...
Non-linear detection for multi-antenna (MIMO) systems using iterative detection and decoding offers superior communications performance at the cost of an increased computational complexity. Various algorithms from literature solve the underlying search problem using quite diverse approaches. Detection based on a Trellis diagram to structure the search has shown close-to-optimal performance, however...
An ultra-high sensitivity, low-power dual chopper amplifier (DCA) for the signal conditioning of capacitive and voltage-mode microelectromechanical systems (MEMS) transducers is presented. The input referred noise and input parasitic capacitance are minimized to increase the sensitivity for femto-Farad range capacitive transducers. The circuit is designed in a 0.13 µm CMOS technology with a 1.2 V...
A technique for using an N-path filter to precisely measure the phase difference between a pair of periodic signals with the same frequency is presented. It is shown that using the N-path filter and a variable delay cell within a feedback circuit allows for accurate measurement of the phase difference for a two-decade range of amplitude of one of the signals. Simulations demonstrate sub-1° phase resolution...
Freehand three-dimensional ultrasound (3D US) imaging is commonly used for various diagnostic and therapeutic procedures. In this technique, accurate tracking of the US transducer is a crucial requirement to develop high-quality 3D US volumes. However, current methods for transducer tracking are generally expensive and inconvenient. This paper presents a low-cost camera-based system for tracking the...
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