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We present a novel approach to fabricate the biocompatible and stretchable micro-supercapacitors (MSCs) as energy storage units in electronic devices. The interdigital micro-patterns were embedded into polydimethylsiloxane (PDMS) substrate via a combination of microelectronic fabrication techniques. Graphene, as a biocompatible form of carbon, was used as the electrode material due to its high electrical...
Through silicon vias (TSV) are the enablingcomponents in the emerging 2.5D and 3D integrationmicroelectronic packaging. The insulation layer, i.e. the liner, plays the key role in determining the performance of TSV. Polymer liner are receiving a growing attention for its moresuitable properties and simpler processing compared to thetradition silicon dioxide (SiO2) liner. Recently we reported anovel...
Water is promising for liquid cooling of high power electronics due to its high heat capacity and thermal conductivity. However, the ionic impurities and contaminants cause corrosions and threaten the device reliability. We explored capacitive deionization (CDI) of water coolant using hybrid carbon electrode consisting of carbon fiber paper (CFP) and vertically aligned carbon nanotubes (VACNTs). A...
Die stacking is one of the next-generation 3D IC packaging methods, but its stringent material requirements are unlikely to be met by traditional underfills. Moreover, filler trapping is becoming an increasingly serious issue in no-flow and wafer-level underfills. In this report, we demonstrate a novel underfilling technology for the reduction of filler trapping in fine-pitch interconnects. In our...
In this paper, we introduce a novel method to fabricate stretchable RF devices in a high-throughput, high definability manner. Silicone with high elasticity and high hardness is used as both a dielectric substrate and a mold to replicate the pattern from silicon by soft-lithography. A silicone based electrically conductive adhesive (ECA) is used as the conducting material because of its low electrical...
With the continued demand for fine features, enhanced assembly yield, and improved reliability in the microelectronic packaging industry, there is a need to reduce substrate warpage. Factors such as coefficient of thermal expansion mismatch among several materials in the packaging substrate, modulus of different materials, thickness of different layers, orientation of features in each layer, thermal...
Future electronics will undoubtedly require natural integration at the system, device and package level in the form of a functional, flexible package. Functional, flexible electronics expand the functionality of devices allowing morphological-electronic response for ergonomic and natural interfaces between the device and its surroundings. Recent technological successes have been able to fabricate...
One promising application of CNTs in microelectronics is to use vertically aligned CNT (VACNT) arrays as novel thermal interface materials (TIMs). No doubt that the vertical alignment makes the best of the extremely high longitudinal thermal conductivity of individual CNTs; however, it is the CNT/substrate interface that exerts the main restriction on phonon transport through a TIM layer. There are...
By blending flexible epoxy with rigid epoxy or using epoxies with different chain lengths, the mechanical properties of the resulting polymer matrices could be tuned to meet different requirements. With the introduction of nanoparticles into the formulation, better electrical properties of the resulting flexible ECAs (FECAs) have been achieved via particle-particle interface enhancement. Moreover,...
As IC performance increases, many technical challenges appear in the areas of current-carrying capacities, thermal management, I/O density, and thermal-mechanical reliability. To address these problems, the use of aligned carbon nanotubes (CNTs) has been proposed in IC packaging for electrical interconnect and thermal interface materials (TIMs). The theoretically superior electrical, thermal, and...
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