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A low cost methodology for simultaneous testing and tuning of multiple chains of MIMO-OFDM wireless transmitter for system-level specifications is presented. Bandwidth-partitioned test stimuli enable the determination of the behavioral characteristics of the different chains of the RF transmitter using a one-time data acquisition. The determined behavioral characteristics of the transmitters are then...
In this paper, a novel methodology for post manufacture tuning of RF circuits is presented. The procedure uses an iterative test-tune-test algorithm that applies a compact alternative test to the DUT and modulates circuit level tuning knobs (bias/supply values) based on the DUT specification values predicted from the test. The test procedure is repeated until convergence to the desired spec values...
In many DSP applications (image and voice processing, baseband symbol decoding in high quality communication channels) several dBs of SNR loss can be tolerated without noticeable impact on system level performance. For power optimization in such applications, voltage overscaling can be used to operate the arithmetic circuitry slower than the critical circuit path delay while incurring tolerable SNR...
As channel conditions in wireless communications improve, the noise performance of the baseband DSP processor can be degraded to save power without compromising bit error rate. The degradation of baseband signal noise is achieved by degrading the noise performance (reducing the wordlength and supply voltage) of the various baseband signal processing modules in specific proportions defined by a locus,...
In this paper, a process tunable, continuously adaptive wireless front end architecture and related adaptation algorithms are presented that allow an RF transceiver to function at minimum power irrespective of channel conditions and process variability induced performance loss in the RF front end and baseband interface. Current wireless transceiver front ends are designed for worst case channel conditions...
Modern wireless transceiver systems are often overdesigned to meet the requirements of low bit error rate values at high data rates under worst-case channel operating conditions (interference, noise, multi-path effects). This results in circuits being designed with ldquosufficientrdquo margins leading to lower efficiency and high power consumption. In this paper, we develop an adaptive power management...
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