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The electrical performance and reliability of a through-silicon via is investigated through two-dimensional and three-dimensional simulations. Due to the large differences in material thicknesses present in the structures, a 3D simulation is often not feasible. The thermo-mechanical stress, the electrical parameters including TSV resistance and capacitance, as well as the electromigration-induced...
The fully overlapped nitride mask defined (FOND) MOSFETs1) exhibit a much better immunity with respect to hot carrier degradation compared to conventional LDD devices. The reason for the better reliability performance of these devices is the special shape of the LDD extentions formed by the FOND process. In order to simulate electrical properties and hot carrier degradation characteristics of FOND...
In this presentation the NEWSSTAND network is outlined which has been established as a part of the Human Capital and Mobility Programme funded by the EU. Within NEWSSTAND, major semiconductor research centers and companies are active. The network partners combine their individual expertize in order to promote the progress in the field of semiconductor process and device modeling and simulation. Network...
A new method for the three-dimensional (3-D) simulation of LPCVD using a modified string algorithm combined with a redistribution model is presented. Simulation results for rectangular holes are shown. The step coverage predicted by 3-D simulations is compared to step coverages from 2-D simulations. It is shown that the considerable differences observed require the use of 3-D algorithms for the simulation...
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