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We present optically pumped lasing from group IV GeSn/SiGeSn heterostructures. A comparison between double heterostructure and multi-quantum-well microdisk cavities reveals advantages of the multi-well design. Strongly reduced lasing thresholds compared to values from bulk devices are observed.
We propose a high-speed electro-absorption modulator based on a direct bandgap Ge0.875Sn0.125 alloy operating at mid-infrared wavelengths. Enhancement of the Franz-Keldysh-effect by confinement of the applied electric field to GeSn in a reverse-biased junction results in 3.2dB insertion losses, a 35GHz bandwidth and a 6dB extinction ratio for a 2Vpp drive signal.
This paper presents a novel SiGe/Si tunneling field-effect transistor (TFET) which exploits line tunneling parallel with the gate electric field. The device makes use of selective and self-adjusted silicidation and a counter doped pocket within the SiGe layer at the source tunnel junction, resulting in a high on-current Ion = 6.7 μA/μm at a supply voltage VDD = −0.5 V and a constant subthreshold swing...
The need to improve the electronic, thermo-electric or optic device performance as well as an all-Si based integration has significantly increased the requirements for Si/SiGe material. The introduction of strain in Si(Ge), which induces strong energy band modification and through this enhance carrier mobility and absorption/emission properties, has been the dominant technique to enhance the Si(Ge)...
Strained silicon germanium (sSiGe), as channel materials, has received a lot of attention due to its high hole mobility [1]–[4]. sSi/sSiGe/sSOI heterostructure substrate [5]–[8] takes the advantages of the tensile strained Si layer, and thus can increase the critical thickness for pseudomorphically grown SiGe with high Ge concentration. In this work, QW p-MOSFETs [9]–[11] on sSi/sSi0.5Ge0.5/sSOI substrate...
We report on n-channel tunneling field-effect transistors (TFET) with a tensile strained Si channel and a compressively strained Si0.5Ge0.5 source. The device shows good performance with an average subthreshold swing S of 80mV/dec over a drain current range of more than 3 orders of magnitude. We observed that an applied back-gate bias increases the on-current by a factor of 1.6, and improves the off-current...
The chemical reactions at the higher-k LaLuO3/Ti1NX/poly-Si gate stack interfaces are studied after high temperature treatment. A Ti-rich TiN metal layer degrades the gate stack performance after high temperature annealing. The gate stack containing TiN/LaLuO3 with a near stoichiometric TiN layer is stable during 1000 °C, 5s anneals. Both electrical and structural characterization methods are employed...
Compressively strained Si1-xGex band-to-band tunneling field effect transistors with planar structure and HfO2/TiN gate stack have been produced and analyzed, with different Germanium concentrations of x = 0.35, 0.50 and 0.65. Simulations using a nonlocal band-to-band-tunneling model have been carried out to understand the switching behavior and its dependence on the material parameters. One would...
P-MOSFETs with HfO2 gate dielectric and TiN metal gate were fabricated on compressively strained SiGe layers with a Ge content of 50 at.% and electrically characterized. The devices showed good output and transfer characteristics. The hole mobility, extracted by a split C-V technique, presents a value of ~200 cm2/V·s in the strong inversion regime.
Integration of lanthanum lutetium oxide (LaLuO3) with a κ value of 30 is demonstrated on high mobility biaxially tensile strained Si (sSi) and compressively strained SiGe for fully depleted n/p-MOSFETs as a gate dielectric. N-MOSFETs on sSi fabricated with a full replacement gate process indicated very good electrical performance with steep subthreshold slopes of ~72 mV/dec and Ion/Ioff ratios up...
The implementation of more powerful materials into leading edge CMOS devices allows performance improvements without scaling and without changing the circuit design libraries. This highly motivates the research on novel materials. In this paper we present various transistor fabrication processes like “gate first” and “replacement gate” for different channel stack configurations like strained Si, strained...
Recent experimental results on Si nanowire MOSFETs are presented. The devices were fabricated in a top-down approach on unstrained and biaxial strained SOI substrates exhibiting good I-V characteristics with Ion/Ioff-ratios of 107 and off-currents as low as 10-13 A. Subthreshold slopes of about 70 mV/dec for SOI n- and p-FETs and 65 mV/dec for strained SOI n-FETs were obtained. The on-current and...
Advanced SOI material can be treated in advantageous manner regarding ultra shallow junction (USJ) formation using millisecond annealing techniques. Especially, strained Si and SiGe/Si heterostructures on insulator (sSOI and sHOI) are promising channel materials for future nanoelectronic devices. Their successful integration into new device architectures depends on the ability of forming ultra shallow...
We present experimental results on mobility enhancement and on-current gain in Si NW-FETs fabricated on SOI and biaxially strained SOI. In SSOI long channel devices a 2.3 times larger mobility and similar on-current improvement compared to SOI are measured. Measurements on SSOI NW-FETs with different length to width ratio highlight that mobility enhancement due to lateral strain relaxation sensitively...
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