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Since large array devices of MOSFETs are huge for driving capabilities, ESD self protections are also required. Then, the large drain-contact-to-poly-gate-spacing layout rule is usually adopted with large layout areas. In this paper, a new control circuit is implemented for adopting the minimum device layout rule in the LAD. Hence, it results in a very small layout area and ESD self-protection capabilities...
In this paper, we report Ge p- and n-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) with NiGe source/drain (S/D) with high performance and low leakage current. The forward/reverse current ratio of the NiGe/n-Ge and NiGe/p-Ge junctions were \(\sim 10^{5}\) and \(\sim 2 \times 10^{4}\) at \(|V| = \pm \) 1 V, respectively. Interface state densities \(D_{\rm it}\) of Al2O3...
A High-side Lateral Trench MOSFET (LTDMOS) was fabricated in a 0.35 mum ModularBCDtrade technology. The drift region of this device completely surrounds and isolates the trench, body, and source regions from the substrate, allowing the entire LTDMOS to float to a high-voltage above the substrate. A complete 28 V half-bridge level-shifter was demonstrated using integrated floating high-side drive circuitry...
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