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Low cost wafer-level chip-scale vacuum packaging (WLCSVP) imposes unique constraints on potential implementation of through-silicon vias (TSVs). A WLCSVP requires a relatively thick substrate to prevent mechanical failure. Two approaches for integrating TSVs in thick silicon wafers have been successfully demonstrated. Both approaches enable TSV formation from the backside of a device wafer and are...
HRL Laboratories is part of an intense research and development effort to leverage the enormously advanced infrastructure of Si CMOS and the high performance of diverse electronic and photonic devices in an integrated technology. While System in a Package (SiP) and System on a Chip (SoC) approaches involve chips produced in their native foundries and subsequent integration using hybridization or multi-chip...
This paper reports a three-step fabrication method for highly ordered silica nanowire bunch arrays of diversiform shapes. After patterning of organic polymers on Si substrates through photo lithography, oxygen plasma bombardment is applied to fabricate nanowire bunch arrays. On one hand, oxygen plasma exploits Si source from the substrates, and, subsequently, the gaseous Si react with active oxygen...
This paper will provide a comprehensive overview on the liquid optically clear adhesive (LOCA) technologies display assembly, including materials, application process, and performance, the recent technology trend of FTF-LCD polarizer, and Henkel's new LOCAs with ultra-low viscosity and excellent performance for next generation polarizer applications.
Summary form only given. CdS is a promising material for flat panel displays, light-emitting diodes, lasers, logic gates, and transistors. CdS has attracted special interest because it exhibits high photosensitivity and its band gap energy (2.41 eV) and electron affinity (4.5 eV) appear in the visible spectrum [1]. In this work, CdS deposition on surface of the vertical aligned carbon nanotube (VACNT)...
An In0.23Ga0.77As-based planar Gunn diode operating in its fundamental transit-time mode of oscillation at 116 GHz with output power of -24 dBm is demonstrated. The diode has a pseudomorhpic HEMT-like structure grown on a semi-insulating GaAs substrate. The layer design was carried out using a two-dimensional drift-diffusion model. The realized devices show considerable potential as a source of millimeter-wave...
Flip chip packages are becoming more popular due to many factors such as electrical performance, functionality and high I/O interconnections. To fulfill such needs in different applications, chip sizes are gradually becoming larger. Due to the large die sizes with high pin count, small bump pitch and low-K inter-metal-dielectric material, reliability concerns are arising at the interfaces of die,...
The memory characteristics of IrOx metal nanocrystals in an n-Si/SiO2/Al2O3/IrOx/Al2O3/IrOx structure with a small EOT of ˜6 nm have been investigated. The IrOx metal nanocrystals with a small size of ˜3 nm and high-density of ˜0.7??1013/cm2 have been observed. The enhanced memory characteristics with a large memory window of ΔV˜4V at a small gate voltage of ≪5V and good endurance of 104 cycles are...
The increased functionality of today's advanced electronics, such as multi-function mobile equipment, is driven by semiconductor technology development. The added functionality of semiconductor and passive devices increase circuit density and decrease the available assembly space in the device. Packaging substrates are controlled by semiconductor trends. As semiconductor chip performance improves,...
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