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In this paper, a novel triple reduced surface field (RESURF) LDMOS with N-top layer based on substrate termination technology (STT) is proposed. The analytical models of surface potential, surface electric field, breakdown voltage (BV) and optimal integrated charge of N-top layer (Qntop) for the novel triple RESURF LDMOS are achieved. Furthermore, STT is applied to avoid the premature avalanche breakdown...
An improved breakdown voltage LDMOS with reduced specific on-resistance is proposed and its mechanism is investigated. The LDMOS is characterized by a junction-type field plate (JFP) and an N+ floating layer (NFL) in the p-substrate. First, the linear doped JFP not only modulates the surface electric field (E-field) distribution of the drift region to make it more uniform and thus increases the breakdown...
In this paper, a novel Bi-directional Electric Field Enhanced Field Stop Reverse Blocking Insulated Gate Bipolar Transistor (BEFE-FS-RB-IGBT) is proposed. It features N-type field stop layers and P-type electric field enhancement regions in both top trench MOS cell part and the anode side of the device. From the simulation results, the thickness of the drift region can be reduced to 58μm, only 70%...
A new BLR structure with P type islands (PI-BLR) is proposed, the principle of which is to introduce P type islands into the JFET region of the basic BLR structure. The forward voltage drop (VF) of BLR can be further reduced without affecting the breakdown voltage of BLR. Thus, an attractive method is provided to coordinate the trade-off relationship between forward voltage drop and breakdown voltage...
A novel n-channel VDMOS fabricated on 4H-SiC is reported. This device is a distinct double-layer structure with an ultra-thin n-doped region under a fully depleted p-body region in the channel region which induces a larger amount of carriers when the gate bias exceeds the threshold voltage, with little leakage current in off-state. As a result, the specific on-resistance of the VDMOS is 6.21 mΩ·cm...
A novel high performance enhanced-planar IGBT with p-type buried layer (PBL-EPIGBT) is proposed in this paper. The p-type buried layer (PBL) is placed outside the n-type carrier stored (N-CS) layer and encompasses it partially. Compatible with the conventional EPIGBT technology, the PBL of the proposed structure can be formed by ion implantation and diffusion before the formation of the N-CS layer...
A Magnesium Doped Layer (MDL) under the 2-DEG channel and a Drain Metal Extension (DME) are proposed to provide a new degree of freedom in the optimization between breakdown voltage (BV) and specific-on-resistance (Ron-sp) in AlGaN/GaN HEMTs. The surface electric field of the proposed structure is distributed more evenly when compare to the MDL-only structure with the same dimensions. A breakdown...
A superjunction LDMOST with a floating oppositely doped buried layer in p-substrate is proposed. The buried layer provides another pn junction to sustain drain voltage, reduces the substrate-assisted-depletion effect and generates new electric field, which modulates the bulk electric field in off-state. Simulation results show that the proposed structure achieves significant breakdown voltage improvement...
A lateral power MOSFET with the extended trench gate is proposed in this letter. The polysilicon gate electrode is extended to the substrate, which improves the breakdown voltage (BV) and specific on-resistance (Ron). It indicates by simulation that the Ron of 1.86mΩ.cm2 with a BV of 174V in the proposed structure is nearly 53% less than the Ron of 3.96mΩ.cm2 with a BV of 126V in the typical structure.
A novel non-uniform multi-reversed-junction power MOSFET is presented in this paper. The high and uniform electric field in substrate is achieved due to modulating from space charges in the buried layers during operation in the blocking mode, and the breakdown voltage is improved considerably. A detailed study of the influence of various important parameters on blocking characteristics was carried...
This paper presents a high voltage AlGaN/GaN HEMTs with remarkable breakdown voltage enhancement by introducing a magnesium doping layer under the 2-DEG channel. The surface electric field is distributed more evenly when compare to a conventional device structure with the same dimensions. This is primarily due to the presence of a charge balanced magnesium doping layer acting as a floating field plate...
A new lateral insulated-gate bipolar transistor (LIGBT) structure on SOI substrate, called buried N-region controlled anode LIGBT (BNCA-LIGBT), is proposed and discussed. The BNCA-LIGBT is a modified structure of the N-region controlled anode LIGBT (NCA-LIGBT) which we have presented earlier. Numerical simulation results of the BNCA-LIGBT operation show that the turn-off speed is faster and on-state...
Device simulations are applied to find out the effects of floating island thickness (dF) and doping concentration (Np+) in power floating island MOSFET (FLIMOS). The simulation results show that the specific on-resistance (Ronmiddotsp) increases by enlarging dF while Np+ produce little influence on Ronmiddotsp; When Np+ is low, the breakdown voltage (Vbr) improves by enlarging dF; When Np+ is high,...
A new Lateral insulated-gate bipolar transistor (LIGBT) structure on SOI substrate, called controlled anode LIGBT (CA-LIGBT), is proposed. The design of the new structure results in high breakdown voltage and good trade off between turn-off time and on-state voltage drop. Simulation results show that the CA-LIGBT has about 85.0% reduction in turn-off time and about 20.0% increase in on-state voltage...
A new super junction LDMOS (SJ-LDMOS) on partial silicon-on-insulator (SOI) with composite substrate is presented in this paper. The thin super junction structure on the buried oxide (BOX) provides the surface low on-resistance path, which is attributed to the heavy doping trait of SJ. The N-buffer layer is introduced under the BOX to sustain vertical voltage, which reduces the substrate-assisted...
A novel structure of 4H-SiC bipolar junction transistor (BJT) with floating buried layer (FBL) in the base epilayer is presented. Numerical simulations are performed to demonstrate that the current gain shows an approximately 100% increase due to the creation of buried layer electric-field. However, the variation rate of current gain is decreased sharply indicating FBL structure with high current...
In this paper, a novel substrate engineered power MOSFET with partial floating buried-layer is proposed. The proposed LDMOS with 2 mum thin epitaxial layer is designed . It is demonstrated that new electric field generated by the buried-layer modulates electric field in drift region and the voltage handling capability is enhanced. Influences of length, thickness and doping concentration of the buried-layer...
A novel concept of REBULF (REduced BULk Field) is proposed for the development of smart power integrated circuit with thin epitaxy layer, and a new device structure of Reduced BULk Field LDMOS with N+-floating layer embedded in the high-resistance substrate is designed. The mechanism of improved breakdown characteristics is that the high electric field around the drain is reduced by N+-floating layer...
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