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The reliability of the power supply is an important index to evaluate the technology of distribution networks. The burn-in and failure of switches in distribution networks, the artificially maintenance plan and testing switches will reduce the reliability of the power supply of distribution networks. In this paper, we have proposed a method of schematically testing state of switches in distribution...
Effective segmentation of symptoms from crop diseased images is a vital important step in the timely detection of crop disease based on image processing techniques. Many of the formerly proposed methods still did not show a satisfactory performance in the extraction of symptoms from RGB images, especially when the images contain specularly reflected and shadowed parts. In this paper, we propose a...
As metro systems have become more advanced, Communication-Based Train Control (CBTC) has been increasingly valued because of its characteristics. It is, however, necessary to guarantee that the CBTC system is safe so that the safety of the whole metro system can be improved. Traditional off-line testing methods are widely used to determine whether the CBTC system complies with the desired specification,...
Islanded operation of HVDC sending system can reduce the influence of HVDC fault on the parallel AC system, enhance the security of the system and increase the transmission capacity. Due to relatively small system inertia and ESCR, there are difficulties of the frequency and voltage control in the islanded sending system. The conventional analysis are focuses on the process after HVDC bipolar trip...
Precast Segmental Reinforced Concrete Walls (PS-RCWs) are construction units recently developed for modern modular construction. A typical PS-RCW is comprised of cast-in-place concrete enclosed by two precast concrete panels. This paper experimentally investigates performance of the PS-RCWs under eccentric compressive loading. Eight specimens including seven PS-RCW specimens and one conventional cast-in-place...
Dynamic reconfiguration system allows us to dynamically allocate hardware resources as needed by particular applications. This paper focuses on the application of FPGA-based partial dynamic reconfiguration system (PDRS) with configurable boundary-scan circuit (CBSC), which can be used in many different fields, especially in the military and aerospace fields. Generally speaking, if an important function...
The eddy current testing technology, principle and applications were presented, and while also the eddy current probe production of the detection system were highlighted, and ultimately a set of eddy current testing system is given. Enterprise application showed that it can meet the measuring ability and it smash up the foreign monopoly market to similar equipment in China.
Nitrification and denitrification were commonly used in the recirculating aquaculture system (RAS) to decrease the ammonia and nitrate concentration. The variation characteristics of nitrogenous compounds and microbiology in a closed RAS were studied with gradually increasing ammonia-nitrogen (NH4+-N) concentration. The NH4+-N was completely converted into nitrite nitrogen (NO2--N) in 46 days,...
To determine the target users of a company, a new data mining model is proposed. The new method can serve as an efficient vehicle for firms not only to predict the products or services that should be provided or improved for their target user groups, but also to identify the right users for a specific product family or service.
A novel Built-In-Self-Test (BIST) approach is present in this paper to test the clock manager DLL of system-on-chip (SoC). The whole approach is divided into two steps. Firstly, test a single DLL which will be used as the benchmark in step two by introducing a test clock which is the jitter embodiment of the reference clock. The proposed method with a view to test the reference clock jitter tolerance...
A novel Built-in Self-Test (BIST) approach to test the configurable Input/Output buffers in Xilinx Virtex series SOCs using Hard Macro has been proposed in this paper. The proposed approach can completely detects single and multiple stuck-at gate-level faults as well as associated routing resources in I/O buffers. The proposed BIST architecture has been implemented and verified on Xilinx Virtex series...
This paper presents a built-in self-test (BIST) approach to test embedded memory blocks in configurable system-on-chips (SoCs). The idea of this paper is to develop BIST architecture and BIST configurations for testing embedded memory blocks in Xilinx Virtexl-4 series SoCs by using an embedded FPGA core. The proposed approach tests RAMs operating in all of different sizes both in single-port and dual-...
This paper presents a built-in self-test (BIST) approach for testing configurable logic and memory resources in Xilinx Virtex FPGAs using hard-macro. The resources under test include the configurable logic blocks (CLBs) and block random access memories (BRAMs) in all of their modes of operation. The proposed approach completely detects and diagnoses single and multiple stuck-at gate-level faults of...
In this paper, we introduce a novel end-to-end approach to QoS management with respect to the diagnosis of QoS violations. We first use a set of end-to-end flow traffic statistics to describe a QoS violation. Subsequently, neural network techniques are engaged to identify and differentiate QoS violations through classification of the collected statistics. Through experiments, we find that our scheme...
With the increasing scale of software and the exploding amount of data, software performance problem has become more and more serious, drawing more and more people to study the way of testing softwarepsilas performance. Although there are many performance test methods focusing on B/S structured system, other systems are ignored. In this paper, the common performance test procedure is given first,...
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