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Carbon Nanotube (CNT) based interconnect has become the most promising replacement for Cu based interconnect in future VLSI technology in the nanometer regime. In this work, we compare the performance of copper (Cu) and CNT based interconnect for four ITRS technology nodes. We also analyze the timing delay in CNT based interconnect under different process, temperature, and voltage (PTV) corners for...
The work analyses the crosstalk effects in Carbon Nanotube (CNT), and its impact on the gate oxide reliability. Using the existing models of CNT, the circuit parameters for CNT-bundle interconnect are calculated and the equivalent circuit has been developed to perform the crosstalk analysis. The crosstalk induced overshoot/undershoots have been estimated and the impact of the overshoot/undershoots...
With continued scaling of technology into nanometer regimes, the impact of coupling induced delay variations is significant. While several coupling-aware static timers have been proposed, the results are often pessimistic with many false failures. We present an integrated iterative timing filtering and logic filtering based approach to reduce pessimism. We use a realistic coupling model based on arrival...
Logic cell modeling is an important component in the analysis and design of CMOS integrated circuits, mostly due to nonlinear behavior of CMOS cells with respect to the voltage signal at their input and output pins. A current-based model for CMOS logic cells is presented which can be used for effective crosstalk noise and delta delay analysis in CMOS VLSI circuits. Existing current source models are...
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