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Asynchronous controllers based on Asynchronous Finite State Machines (AFSM) are widely used in the control unit design of asynchronous systems. These systems can be implemented in Field Programmable Gate Arrays (FPGAs), which are a low cost design alternative. Different styles have been proposed to implement AFSMs, but all of them have limitations when implemented in FPGAs. Therefore, this paper proposes...
Controllers based on Synchronous Finite State Machines (SFSM) are widely used in the design of digital hardware and that can be implemented in Field Programmable Gate Arrays (FPGAs). A class little known and very interesting of SFSM in the FPGA platform is the SFSMs of direct output (SFSM_DO). These state machines use the output signals as state signals, thus allowing several advantages when compared...
Digital circuit design may demand critical requirements, such as power consumption, robustness, performance, etc., while being implemented in VLSI (Very Large Scale Integration). The asynchronous paradigm presents interesting features that serve as an alternative to these critical requirements. An important class of the asynchronous paradigm is the one called QDI (Quasi Delay Insensitive) circuits...
Taking advantage of synchronous and asynchronous paradigms, a new style of design, called Globally Synchronous Locally Asynchronous (GSLA), has achieved very interesting results. In this paper, we propose a synchronous wrapper that allows the communication of “synchronous to asynchronous to synchronous” modules. Internally, the proposed interface comprises an asynchronous module. The GSLA design style...
Synchronous controllers are finite state machines (FSM) that utilize flip-flop memory elements to store states and the clock signal to synchronize their operations. In a digital system, the activity of the clock is a major source of energy dissipation. It is responsible for 15% to 45% of the total consumed energy. Reducing the activity of the clock leads to a reduction of the total energy. An interesting...
Asynchronous paradigm is another option for the project of digital systems. Several design styles can be used, where the micropipeline style is the most suitable one for FPGA platforms because it has a simpler control. It is proposed new pipeline architecture to implement asynchronous systems, in bundled-data micropipeline style, having FPGAs as target devices. One drawback of the bundled-data design...
Taking advantage of synchronous and asynchronous paradigms, a new style of design called Globally Synchronous Locally Asynchronous (GSLA) has achieved very interesting results. In this paper, we propose a high-performance interface that allows the communication of synchronous to asynchronous to synchronous modules. Internally, the proposed interface comprises an asynchronous module. The GSLA design...
This paper presents a method for an optimized synthesis of asynchronous digital systems having an FPGA as target device. The method employs the decomposition design style (data-path + controller) and uses the extended burst-mode specification to describe the controller. Asynchronous system synthesized by the method operates in “two-phase handshake protocol”, allowing a better performance. In this...
Controllers based on Synchronous Finite State Machines (SFSM) are widely used in the control unit design of complex digital systems. These systems can present critical requirements, such as power consumption, robustness, speed, etc. In this context, the asynchronous paradigm shows interesting features that fit as an alternative for the design, but the lack of appropriate tools and the high difficulty...
The asynchronous paradigm has interesting features due to the lack of the clock signal and it is another option for the project of digital systems. This paradigm has several design styles, where the micropipeline style is the most suitable one for FPGA platforms, due to the simplicity of its control. In this paper, we propose a pipeline architecture to implement asynchronous digital systems, in bundled-data...
Complex synchronous digital systems can be implemented on FPGAs (Field Programmable Gate Arrays), but due to the global clock, might have problems with clock skew, performance degradation and increased of power consumed. An alternative to these designs is the asynchronous paradigm that solves the problems related to the clock. However it is difficult to design asynchronous circuits, especially in...
Contemporary digital systems must be based on the “System-on-Chip — SoC” concept. An interesting style for SoC design is the GALS paradigm (Globally Asynchronous, Locally Synchronous), which can be used to implement circuits in FPGAs (Field Programmable Gate Arrays), but the implementation of asynchronous interfaces (asynchronous wrapper — AW) constitutes a major drawback for this kind of devices...
Contemporary digital systems must necessarily be based on the “System-on-Chip - SoC” concept. An interesting style for SoC design is the GALS (Globally Asynchronous, Locally Synchronous) paradigm, which can be used to implement circuits in FPGAs (Field Programmable Gate Array). Although these devices have the benefits of low-cost and short development time, there's a major drawback which is implementing...
FPGAs have been mainly used for designing of synchronous controllers. However, it is difficult to design asynchronous controllers on them because the circuit may suffer from hazard problems. This paper presents a method that implements a class of asynchronous controllers on FPGAs which are based on Look-Up Table (LUT) architectures. Asynchronous controllers specification used in heterogeneous (synchronous...
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