The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Hierarchical routing resources play vital role in FPGA routing. Better routability options can be obtained using segmented approach of wires thus enabling routing optimization. Source and sink logic blocks can be connected via wire segments such that the overall wire length and switching transistors inside the switch box can be saved over an extent. This paper presents an experimental approach of...
Three-dimensional integration suffers from heat dissipation between the layers due to the power consumed by various resources. In this paper, we show the significance of distribution of power density among the layers of a three-dimensional integrated circuit structure which can reduce the overall chip temperature as well as the peak temperature. Our experiments are developed using industry standard...
Rodents as widespread pests cause significant damages to the crops, stored foods, human being and properties. For rodent's control there has been no systematic high-tech solution so far. We aim to raise this problem as a new challenging and multidisciplinary research area. We will propose our solution based on cyber-physical systems (CPSs) and will elucidate enabling technologies and frontiers for...
Power becomes an ever-increasing concern due to the growing design complexity and the shrinking process technology. Power estimation at an early stage of electronic design automation (EDA) flow is essential in order to handle the design issues much earlier. Also power due to the routing resources is a dominant in field-programmable gate arrays (FPGAs). In this paper, we introduce a methodology for...
Power becomes an ever-increasing concern due to the growing design complexity and the shrinking process technology. Power estimation at an early stage of electronic design automation (EDA) flow is essential in order to handle the design issues much earlier. Also power due to the routing resources is a dominant in field-programmable gate arrays (FPGAs). In this paper, we introduce a methodology for...
Three-dimensional FPGA is one of the promising innovations which can lead to the reduction in delay, area and power. There is an absolute necessity to develop algorithms and software tools to exploit the advantages of the third dimension, and to solve complex tasks associated with them. Also, thermal issues are cited as critical concern in 3D integration which results in degradation of device performance...
Thermal management is one of the main concerns in three-dimensional integration due to difficulty of dissipating heat through the stack of the integrated circuit. In a 3D stack involving a data-path accelerator, a base processor and memory components, peak temperature reduction is targeted in this paper. A mapping algorithm has been devised in order to distribute operations of data flow graphs evenly...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.