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We present an integer-N all-digital frequency-locked loop (ADFLL) suitable for dynamic voltage and frequency scaling in system-on-chips targeting mW-consumption. The proposed ADFLL operates with a 32 kHz clock reference, and offers a large clock multiplication factor of 32786, resulting in a wide tuning-range from 19 kHz to 1.048 GHz at 1.2 V and to 250 MHz at 0.8 V,. It incorporates a jitter reduction...
Spectral activity detection in wideband radio-frequency (RF) signals for cognitive-radio applications typically necessitates expensive and energy-inefficient analog-to-digital converters (ADCs). In this paper, we present a novel compressive sensing (CS)-based analog front-end, which is able to sample sparse wideband RF signals at low cost and low power. The analog front-end consists of a pseudo-random...
Radio communication is among the most energy consuming tasks in wireless sensor nodes. Reducing the amount of data to be transmitted holds a large power saving potential. The combination of compressed sensing (CS) and local signal parameter estimation can achieve a massive data rate reduction in applications where the primary interest is in the acquisition of a scalar feature of the signal rather...
Spectral activity detection of wideband radio-frequency (RF) signals for cognitive radios typically requires expensive and energy-inefficient analog-to-digital converters (ADCs). Fortunately, the RF spectrum is—in many practical situations—sparsely populated, which enables the design of so called analog-to-information (A2I) converters. A2I converters are capable of acquiring and extracting the spectral...
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