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A noise-shifting coupling network is proposed for nonlinear passively coupled quadrature voltage-controlled oscillators (QVCOs). Both detailed analysis and circuit implementation demonstrate that the noise contribution by the coupling network can be minimized by re-aligning the phases of the noise modulation function and the impulse sensitivity function with a reduced magnitude. In addition, the QVCO...
This paper presents a noise-shifting coupling network to minimize the phase noise contribution from the coupling devices of quadrature voltage-controlled oscillators (QVCOs). Through capacitive feedback, the noisy currents of the coupling devices are shifted to be orthogonal to their impulse sensitivity function (ISF). Fabricated in 65nm CMOS technology, a 7.9-GHz QVCO prototype measures phase noise...
Ring-VCO-based PLLs are popular because of their compact chip area and wide tuning range compared with LC-VCO-based PLLs. However, they typically have higher jitter and larger frequency drift due to high sensitivity to PVT variations. Several PLL architectures were proposed to reject the phase noise and reduce the frequency drift [1,2]. However, due to an architecture-level limitation, these phase-noise-rejection...
This paper presents a power efficient static frequency divider (SFD) for wideband operation. Series inductive peaking technique is utilized to construct broadband input network of the divider. The aspects of design using the technique are supported with exhaustive simulations. The prototyped divided-by-two frequency divider is implemented in 65 nm LP CMOS technology. Measurement results show that...
General methods of SC networks design for SC bandgap reference are proposed. The methods are based on the conversion between parallel and series connection of the capacitors. The prototyped SC bandgap reference is designed in 65 nm LP CMOS process. Simulation result shows that temperature coefficient of the reference voltage is achieved to 25 ppm/°C from −20 to 100°C .
The paper analyzes the principle of the technique using low voltage current source to improve the power supply rejection ratio (PSRR) of operational amplifiers (OPAs). The technique has advantage of decreasing the parasitic gain from power supply with no detrimental effect on the output swing. A single supply two-stage Miller compensated OPA is presented as a prototyped circuit. The simulation results...
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