The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Multicore system analysis requires efficient solutions for architectural parameter and scalability exploration. Long simulation time is the main drawback of current simulation approaches. In order to reduce the simulation time while keeping the accuracy levels, trace-driven simulation approaches have been developed. However, existing approaches do not allow multicore exploration or do not capture...
Nowadays, power consumption is the one key factor that hinders System-on-Chip (SoC) performance. In order to reduce the power consumption, accurate and efficient power models have to be introduced early in the design flow, when most of the optimization potential is obtained. However, early accuracy cannot be ensured because of the lack of precise knowledge of the circuit structure. Current SoC design...
Power management techniques are applied at high abstraction levels to reduce chip power consumption. Accurate and efficient power models are needed as early as possible in the design flow to ensure that correct saving decisions are taken. However, accuracy at those levels cannot be ensured, as there is not exact knowledge of the circuit structure. Then, power models based on estimation techniques...
Subtle defects such as low resistive vias and high resistive shorts cause Small-Delay Defects that are hard to detect even by advanced test methodologies. Detection of these defects aggravates with process variations becoming an important source of test escapes. Furthermore, these defects may degrade with time posing a reliability risk. In this paper, a novel methodology to detect SDDs in the presence...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.