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Traditional logic synthesis faces challenges of meeting the requirements demanded by the many emerging nanotech-nologies that are based on logic models different from standard CMOS. Several emerging nanodevices including Quantum-dot Cellular Automata (QCA) and Spin Torque Majority Gates (STMG) are based on majority logic. In addition, technology constraints require to restrict the number of fan-outs...
Many emerging nanotechnologies realize majority gates as primitive building blocks and they benefit from a majority-based synthesis. Recently, Majority-Inverter Graphs (MIGs) have been introduced to abstract these new technologies. We present optimization techniques for MIGs that aim at rewriting the complemented edges of the graph without changing its shape. We demonstrate the performance of our...
In this paper, we present a design and benchmarking methodology of Spin Wave Device (SWD) circuits based on micromagnetic modeling. SWD technology is compared against a 10nm FinFET CMOS technology, considering the key metrics of area, delay and power. We show that SWD circuits outperform the 10nm CMOS FinFET equivalents by a large margin. The area-delay-power product (ADPP) of SWD is smaller than...
In this paper, we present a standard cell design methodology for Spin Wave Device (SWD) circuits. We perform Place and Route (P&R) experiments against a 10nm FinFET CMOS technology and compare the area, the routing and metal distribution of several arithmetic benchmarks. We show that SWD circuits although they require more metal layers than CMOS designs and although they contain double the number...
Spin Wave Devices (SWDs) are promising beyond-CMOS candidates. Unlike traditional charge-based technologies, SWDs use spin as information carrier that propagates in waves. In this scenario, the logic primitive for computation is the majority gate. The majority gate has a greater expressive power than standard NAND/NOR gates, allowing SWD circuits to be more compact than CMOS, already at the logic...
Spin Wave Devices (SWDs) are promising candidates for scaling electronics beyond the domain of CMOS. In contrast to traditional charge-based technologies, SWDs rely on propagating oscillation of magnetization as information carrier. Thanks to the intrinsic wave computation capability of these devices, the majority gate is implemented with low physical re-sources. Being more expressive than standard...
Polarity-controllable transistors have emerged in the last few years as an adequate successor of current CMOS FinFETs. Due to the additional polarity terminal, novel physical design techniques are required. We present a novel grid-based power routing scheme able to mitigate the polarity terminal impact. The logic cells are organized in regular arrangements and easily configured using the novel power...
Using a SiGe quantum well (QW) high mobility channel is an option for advanced PMOS Bulk finFET devices. This work presents the impact on the ESD robustness of gated nwell diodes and PMOS devices by moving from Si channels to SiGe QW channels, and by changing the device architecture from planar to bulk FinFET.
The next technology option to keep CMOS scaling on pace after the introduction of finFETs, is the use of High Mobility channels. For the first time, the ESD reliability of such a technology option is studied for pMOS devices using SiGe Quantum Well and Ge channels.
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