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Solid state drives (SSDs) that deliver high- bandwidth and low-latency performance have become the mainstream of storage devices in modern systems. Over the past years, there has been a great deal of researches conducted to improve the SSD performance or reliability with parallel or efficient address translation designs. On the contrary, little work is done for the optimization to guarantee the booting/recovery...
Flash memory is widely used in mobile phones to store contact information, applications files and other types of data. In an operating system, the buffer cache keeps the I/O blocks in DRAM to reduce the slow flash accesses. However, in smartphones, the benefits of buffer cache are reduced due to the bulk of synchronous writes of applications for reliability issues. In this paper, we propose a buffer...
As technology continues to scale, reducing leakage is critical to achieve energy efficiency. Power gating can potentially save a significant part of leakage but it incurs both energy and performance penalties. Therefore, power gating decisions need to be made carefully. In the current low-power SoC design, an IP core is power gated when it is not operating. In this paper, we explore the IP idle time...
Optimizing memory system performance is critical for delivering high system performance for multimedia applications since they are usually memory intensive. As the number of IP cores in a multimedia MPSoC (Multi-Processor System-on-Chip) continues to increase, system performance will be eventually limited by the memory system. In this paper, we tackle the memory performance issue of multimedida MPSoCs...
Platform-based system-on-chip (SoC) design has been a commonly used design methodology for billion-transistor SoC coupled with short time to market requirement. One main issue of the system level design in a platform-based SoC is to determine the system architecture that meets the design goals. To avoid over-design, or a design that cannot meet the design goals, a tool with the ability to provide...
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