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We review the operation mechanisms of the Z2-FET underlining its attractiveness as a capacitorless DRAM memory. The main parameters that govern the memory performance are discussed based on systematic experiments and simulations.
Local statistical variability (mismatch) is very important in advanced CMOS technologies critically affecting, among others, SRAM supply and holding voltages, performance and yield. TCAD simulation of statistical variability is essential for identification of variability sources and their control in the technology development and optimization. It also plays an important role in the development of...
For the first time, different impacts of as-grown and generated defects on nm-sized devices are demonstrated. As-grown hole traps are responsible for WDF, which increases with Vg_op and tw. The generated defects are substantial, but do not contribute to WDF and consequently are not detected by RTN. The non-discharging component follows the same model as that for large devices: the ‘AG’ model. Based...
Discreteness of aging-induced charges causes a Time-dependent Device-to-Device Variation (TDDV) and SRAM is vulnerable to it. This work analyses the shortcomings of existing methods for SRAM application and propose a new technique for its characterization. The key issues addressed include the SRAM-relevant sensing Vg, measurement speed, capturing the maximum degradation, separating device-to-device...
It has been shown that sub 100nm SRAM is particularly sensitive to stochastic device variability. In this paper we consider two correlated figures of merit for SRAM, Static Noise Margin (SNM) and Read Current. For the purposes of this paper 1,000 3D atomistic simulations of microscopically different 25nm P and N bulk MOSFETs were performed, and statistical compact models were then extracted for each...
The TRAMS (Terascale Reliable Adaptive MEMORY Systems) project addresses in an evolutionary way the ultimate CMOS scaling technologies and paves the way for revolutionary, most promising beyond-CMOS technologies. In this abstract we show the significant variability levels of future 18 and 13nm device bulk-CMOS technologies as well as its dramatic effect on the yield of memory cells, and what kind...
Quantitative simulations of the statistical impact of negative-bias-temperature-instability (NBTI) on pMOSFETs, and positive-bias-temperature-instability (PBTI) on nMOSFETs are carried out for a 45nm low power technology generation. Based on the statistical simulation results, we investigate the impact of NBTI and PBTI on the degradation of the static noise margin (SNM) of SRAM cells. The results...
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