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This paper introduces a Time-of-Flight sensor of 50 χ 60 pixels in standard CMOS 0.18 μm technology with in-pixel adaptive number of accumulations and background suppression. Background suppression is carried out through two mechanisms, namely, the increase of signal to background ratio, and background subtraction. The pixel features a fill factor of 77% with an nwell over p-substrate diode of 50...
This paper studies the dark current (DC) of the photodiode (PD), the transmission gate (TG), and the floating diffusion (FD) in 4-Transistor (4T) pixels in standard CMOS technologies for Time-of-Flight (ToF) sensors through device simulations. The paper addresses the layout optimization in terms of DC for an nwell/psub and two custom pinned-photodiodes (PPD), stating their pros and cons.
This paper proposes a hardware implementation to speed up the calculation of the feature descriptor vector in the Scale-Invariant Feature Transform (SIFT) algorithm. The proposed architecture, which improves conventional solutions based on embedded processors or other hardware/software co-designs, computes a feature descriptor vector of 27 elements from a keypoint neighborhood of 15×15 pixels. This...
The photodiode structures on a vision chip can be configured in either imaging (IM) or energy harvesting (EHM) mode. The upper voltage achieved with on-chip energy harvesting is below 0.5 V on standard CMOS technologies, thus DC/DC converters are needed to reach the power supply of today CMOS technologies. This paper addresses the design of a Dickson charge pump to this purpose on a standard 0.18...
In this paper two different structures for custom design of pinned photodiodes in standard CMOS technologies are presented and analyzed in terms of dark current.
This paper deals with the optimal design of pinned photodiodes on standard CMOS technologies for Time-of-Flight sensors with the twofold objective of minimizing the dark current while ensuring an optimal charge transfer. The results are verified through CAD simulations with realistic doping profiles for a standard 0.18 μm CMOS technology. To the best of our knowledge, no similar analysis have been...
This paper addresses voltage boosters for on-chip solar cells on a standard 0.18 μm CMOS technology. Voltage boosters, also referred to as DC/DC converters or charge pumps, are needed to make the open voltage of micro solar cells compatible with the power supply of current standard CMOS technologies. This paper is oriented to on-chip solar cells for focal-plane processors, where the photodiode array...
This paper describes a fourth order continuous time band pass filter used to filter analog signals coming from passive infrared sensors (PIR). Specifications for this filter are characterized by an extremely large time constant which strongly condition the topology of the filter used. Moreover, very low power consumption is also required, since these filters are implemented together with the sensor...
A method for designing planar array antennas by controlling the pattern at certain φ angles is presented. This technique can be used over any planar array with equally separated elements. It consists of two steps. First, we collapse the planar array at the fixed angles and calculate the excitations of the equivalent linear array. We then solve the system formed in the previous step to obtain the excitations...
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