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Our analytical compact drain current model for undoped or lightly doped nanoscale FinFETs has been successfully used to predict variability in the electrical characteristics of FinFETs. A simplified version of the model behaves almost as good as the analytical model but is more computational time efficient. Implementation of the models in verilog-A can be used to predict variability in circuits such...
We expanded our analytical compact model for the drain current of undoped or lightly doped nanoscale FinFETs, in order to predict and decompose variability in the electrical characteristics of FinFETs. The model has been evaluated by comparison to TCAD simulated devices with predefined variability. Successful application to experimental data of FinFETs with fin width Wfin= 15 nm, gate length LG =30...
Polycrystalline silicon thin-film transistors (p-TFTs) can significantly be improved in terms of their performance with the bridged grain structure (BG TFTs) by forming lines with higher doping concentration (5×1015–1016 cm−3) across the active channel, equally spaced at a distance close to the average grain size.
The performance of n-channel symmetrical double-gate (DG) polycrystalline silicon thin-film transistors (polysilicon TFTs) has been investigated with 2-D device simulations. The simulations were conducted based on device characteristic properties, extracted from fabricated single-gate (SG) polysilicon TFTs. Through fitting of the test SG devices, a unique set of density of states was identified, that...
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