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The upgrade of the LHCb experiment at CERN envisions a Data Acquisition and Event Filtering system that captures 100% of the data generated by the various sub-detectors, which measure with great precision the 40 million collisions per second of protons in CERN's Large Hadron Collider. The sensor readings result in about 40 Tbit/s of data, which need to be processed on a large computer farm. Since...
In this paper we consider the design and control of an airbreathing hypersonic vehicle. Such vehicles are characterized by non-minimum phase characteristics, instability, actuator saturation constraints, and lightly damped flexible modes.While traditional vehicle design has followed an iterative sequential procedure (with the controller design following an aero-centric vehicle design phase), an integrated...
To handle the expected increase in data rate of the LHCb experiment after the upgrade, a new FPGA based DAQ system has been proposed. As a part of this new DAQ system a Dynamically Adaptive Header Generator has been designed and implemented to packetize the streaming data coming, from the Front-end electronics of the detectors, for easy access and processing by the Servers. This module also dynamically...
This paper examines the issues involved in controlling an air-breathing hypersonic vehicle (characterized by their unstable, non-minimum phase dynamics) in the presence of significant modeling uncertainty and nonlinearities (control saturations). Modeling of the vehicle exhaust (plume) is complicated, often requiring computational fluid dynamic (CFD) simulations to capture all relevant effects. The...
In this paper, we consider the problem of financial portfolio optimization. A hierarchical framework is used, and receding horizon control (RHC) ideas are exploited to pose and solve two relevant constrained optimization problems. We first present the classic problem of wealth maximization subject to risk constraints. We also formulate a new approach to portfolio optimization which attempts to minimize...
A power amplifier chipset for GSM and WCDMA mobile handset PAs has been designed and fabricated in the IBM Silicon Germanium BiCMOS 5AM process. This 3-chip set offers competitive performance and reliability for integrated GSM/DCS-PCS/WCDMA applications. The constant envelope (GSM and DCS-PCS) power amplifier designs are optimized for efficiency under pulsed GMSK conditions, achieving 55% and 45%...
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