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In this paper, we propose a novel power analysis attack resilient adiabatic logic which, unlike existing secure adiabatic logic designs doesn't require any charge sharing between the output nodes of the gates. The proposed logic also dissipates less energy due to the reduced ON-resistance of the charging path. We investigate and compare our proposed and the existing secure adiabatic logic across a...
In this paper, we propose Without Charge Sharing Quasi Adiabatic Logic (WCS-QuAL) as a countermeasure against Power Analysis Attacks. We evaluate and compare our logic with the recently proposed secure adiabatic logic designs SPGAL and EE-SPFAL at frequencies ranging from 1MHz to 100MHz. Simulation results show that WCS-QuAL outperforms the existing secure adiabatic logic designs on the basis of %...
The generation of power-clocks in adiabatic integrated circuits is investigated. Specifically, we consider the energy efficiency of a 2-step charging strategy based on a single tank-capacitor circuit. We have investigated the impact of various parameters such as tank-capacitance to load capacitance ratio, ramping time, transistors sizing and power supply voltage scaling on energy recovery achievable...
The generation of power-clocks in adiabatic integrated circuits is investigated. Specifically, we consider stepwise charging strategies (2, 3, 4, 5, 6, 7, and 8-step) based on tank-capacitor circuits, comparing them in terms of their energy recovery properties and complexity. We show that energy recovery achievable depends on the tank-capacitor size. We also show that tank-capacitor sizes can be reduced...
This paper deals with the design of a low power signal conditioning circuit for use in biomedical applications. The signal conditioning circuit constitutes an opamp serving as a preamplifier and a low-pass filter for rejecting higher frequency components which are uncharacteristic of bio-medical applications. The Operational Transconductance Amplifier (OTA) design is done using UMC 180nm CMOS technology...
A Delay Locked Loops (DLL) suffers from harmonic locking problem over wide-range frequency operation. Phase selection circuit plays an important in DLL. It is used not only to widen the operating frequency range and eliminating harmonic locking problems but also for fast locking mechanism. Normal phase selection circuit has the problem of generating more delayed feedback clock due to which false locking...
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