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In systems ranging from mobile devices to servers, Dynamic Random Access Memories (DRAM) have a large impact on performance and contribute a significant part to the total consumed power. Therefore, it is crucial to have an accurate DRAM power model for exhaustive design space explorations, which can handle different types of DRAM devices. In this paper, we present an improved version of the well known...
In this paper, we present a method to improve the efficacy of a famous leakage reduction technique known as gate length biasing. In proposed method, gate length biasing is combined with progressive sizing. The method greatly reduces both the leakage power consumption and its spread without a significant delay overhead. In addition, it does not increase the complexity of the design. To assess the efficacy...
In this work, we present a multiscale simulation platform as a viable tool to engineer novel electron devices. The tool connects the specific material properties (as atomic defects, interfaces, material morphology) to the electrical behavior of the device, representing a virtual space for the design of novel electrons device purposely exploiting atom-electron interactions. This simulation platform...
Datacenter workloads demand high throughput, low cost and power efficient solutions. In most data centers the operating costs dominates the infrastructure cost. The ever growing amounts of data and the critical need for higher throughput, more energy efficient document classification solutions motivated us to investigate alternatives to the traditional homogeneous CPU based implementations of document...
Ever since the discovery of graphene, the 2D carbon structure material has been attracting a lot interest due its electrical, thermal and mechanical properties. Here, we investigate the carbon nanotubes (CNT), wrapping a 2D graphene sheet to form a 1D carbon structure. CNT has a Dirac-cone energy band, which makes it either a semiconductor or metal. With continuous aggressive scaling, the technology...
Thermal management of nano/microelectronic chips now includes heat spreader elements that allow for decaying the temperature of local hot spots. Graphite films are already in use in commercial products. We will show how few layer graphene films can be used to enhance heat dissipation especially using chemical functionalization based both on demonstrators and on theoretical investigations.
Modern digital designs, beyond adopting measures for energy-, area-efficiency and performance, have to adopt additional measures for a more robust functionality throughout their lifetime. On the way to finding cost-effective resilience approaches, an important first step is to analyze the system behavior in the presence of errors. This gives insight to the system designers regarding the criticality...
Energy-efficiency is one of the most challenging design issues in both embedded and high-performance computing domains. The aim is to reduce as much as possible the energy consumption of considered systems while providing them with the best computing performance. Finding an adequate solution to this problem certainly requires a cross-disciplinary approach capable of addressing the energy/performance...
Full adders are part of electronic systems critical path. These circuits have a fundamental role in the operation of any computer system, from a simplest controller to the most complex microprocessor. There are different ways to implement full adders, varying the transistor arrangement or reducing logical functions. Each approach has advantages and disadvantages well explored in related works in relation...
In this paper a tool based on the gm/ID-methodology is presented to provide information on operating point-dependent degradation in integrated circuits caused by NBTI and HCI during early design stages. The advantage of the presented GMID-Tool is that it does not require any further SPICE or aging simulations after the extraction of the fest and aged small signal parameters of a single transistor...
Power dissipation is one of the challenges of body sensor nodes (BSNs) transceivers in which ultra low power consumption is essential for the sensor QoS. In this paper, m-sequence code generator designs for different code lengths are presented and analyzed to demonstrate their efficiency within the region of subthreshold voltage. The proposed m-sequence generators are investigated at a transistor...
A conventional technique to rise temperature in a processor involves the usage of thermal ovens or infrared techniques to heat up and then measure the temperature of the processor. However, local temperatures of each module cannot be controlled by these techniques. This paper presents a software mechanism to heat-up a processor while the temperature of each modules of the processor can precisely be...
Design automation is very important in modern systems-on-chip development, complexity of which is ever growing. The most crucial issue in highly integrated systems is the increased power density and the corresponding temperature problems influencing reliability. Therefore, the power must be managed in such systems. Power management enables to implement various power-reduction techniques, such as power...
Operating in the Near Threshold Voltage (NTV) region improves the energy-efficiency of CMOS circuits by an order of magnitude. However, the number of hold-time violations significantly grows by scaling the supply voltage to the NTV region due to the increased delay variations. Furthermore, the conventional hold-time fixing approaches based on corner analysis are not applicable to the NTV region. In...
Power is one of the most important metrics in the modern integrated circuit design. We optimize the circuit power using a dual-supply voltage (dual-Vdd) approach. In order to achieve an improved power efficiency, we have applied a new type of pipelining to reduce the number of gates need to be assigned to the high supply voltage given a target delay. Compared to the standard pipelining and the standard...
Recently, manycore architectures are widely adopted for providing the increasing throughput demands and requirements imposed by software complexity and volume explosion. At the same time, the threat of Dark Silicon points to the direction of energy efficient platforms. Near Threshold Computing (NTC) paradigm has recently emerged as the premise of energy efficient operation at the expense of performance...
Accurate and stable CPU power modelling is fundamental in modern system-on-chips (SoCs) for two main reasons: 1) they enable significant online energy savings by providing a run-time manager with reliable power consumption data for controlling CPU energy-saving techniques; 2) they can be used as accurate and trusted reference models for system design and exploration. We begin by showing the limitations...
Energy-efficient, low-cost wireless sensor nodes (WSN) will be a key component in enabling the Internet of Things. The main challenges for these nodes are energy efficiency, cost and ease of software development. At ARM Research, we investigate sub-threshold and near-threshold systems using a custom-built 65nm CMOS ARM Cortex-M0+ platform. This paper will present key challenges of implementing an...
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