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Ion implantation is crucial to successful integration of integrated circuit process flows and has been so for more than 30 years, typically used in steps such as Well and Source/Drain formation. However, beyond those "classical" applications, ion implantation offers a wealth of opportunity directly in transistor design optimization, enabling improvements in defect control, device performance,...
We review recent progress in the application of the two-terminal diode steering element for 3D crossbar (X-bar) memory. Such architecture is emerging as one of the strong candidates for non-volatile memory to enable mobile computing with high speed, low power, and low cost. We address process, integration, and device scaling requirements of the steering element for fabricating PCRAM and metal oxide...
The complexity of ion implant applications in IC fabrication has grown significantly since becoming the preferred process for doping semiconductors. Aggressive device scaling over the last decade raised unique challenges. This resulted in the invention of novel implant applications to address device scaling driven issues and the development of new generations of ion implanters. These newly developed...
We report the first demonstration of a contact technology employing a combination of low energy Aluminum (Al) ion implantation and pulsed laser anneal (PLA) to form nickel silicide (NiSi) with low hole effective Schottky barrier height (ΦBp) on Si. First, the Al implant energy is reduced over prior work to ensure compatibility with thinner NiSi contacts. Second, the effect of PLA on silicide contact...
Strain engineering has become a workhorse in increasing charge carrier mobility to boost performance for sub-45nm CMOS logic technologies. While pFET transistors with embedded Si1−xGex layers in the S/D region have been widely employed to induce compressive strain in the silicon channel, nFET transistors have mostly depended on either tensile liners or stress memorization techniques (SMT) to introduce...
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